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| author | Furquan Shaikh <furquan@google.com> | 2020-06-29 20:11:58 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-07-01 17:55:26 +0000 |
| commit | d1998a5f142d5ae83b80c4a606f595f68c7084e1 (patch) | |
| tree | 2faea705e746ccd74029033ddda22634d11c500b /src/mainboard | |
| parent | 70b7fa1434d63529db3a433c3bd62ccab54611d7 (diff) | |
| download | coreboot-d1998a5f142d5ae83b80c4a606f595f68c7084e1.tar.xz | |
mb/google/zork: Drop GPIO_27 configuration for trembyle reference
This change drops GPIO_27 configuration for trembyle reference boards
since it is unused.
BUG=b:159453643
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I57dd78e8abcc61802ca85158e7ff348460ad1d8e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 835cf9964f..f037b146f6 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -14,8 +14,6 @@ static const struct soc_amd_gpio gpio_set_stage_rom_pre_v3[] = { PAD_GPO(GPIO_5, LOW), /* EC_FCH_WAKE_L */ PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5), - /* PCIE_RST1_L - Variable timings (May remove) */ - PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), /* EN_PWR_TOUCHPAD_PS2 - reset */ @@ -45,8 +43,6 @@ static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = { PAD_GPO(GPIO_13, LOW), /* EC_FCH_WAKE_L */ PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5), - /* PCIE_RST1_L - Variable timings (May remove) */ - PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), /* EMMC_RESET - reset (default stuffing unused)*/ @@ -307,8 +303,6 @@ __weak void variant_pcie_power_reset_configure(void) static const struct soc_amd_gpio gpio_sleep_table[] = { /* PEN_POWER_EN */ PAD_GPO(GPIO_5, LOW), - /* PCIE_RST1_L */ - PAD_GPO(GPIO_27, LOW), /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, LOW), /* EN_PWR_CAMERA */ |