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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-10 14:01:08 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-12 10:59:21 +0000 |
| commit | d1ccecf6eaf525559ffd21a42db9054aa060e82c (patch) | |
| tree | 88a2bf97dfdc828e94b1ef98ddc21f35532df448 /src/mainboard | |
| parent | 851fe8334e75d1b3f372f7878745d65c236a12a4 (diff) | |
| download | coreboot-d1ccecf6eaf525559ffd21a42db9054aa060e82c.tar.xz | |
sb/intel/i82801jx/sata.c: Drop always-false is_mobile check
Also remove the meaningless `sata_traffic_monitor` devicetree option.
Function parameters will be removed in a reproducible follow-up.
Change-Id: I70cf1e06cc8ace504a22be9f9c4441e3070f9e29
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44336
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/intel/dg43gt/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/intel/dg43gt/devicetree.cb b/src/mainboard/intel/dg43gt/devicetree.cb index de2d71dd29..bb2456f537 100644 --- a/src/mainboard/intel/dg43gt/devicetree.cb +++ b/src/mainboard/intel/dg43gt/devicetree.cb @@ -22,7 +22,6 @@ chip northbridge/intel/x4x # Northbridge # Set AHCI mode. register "sata_port_map" = "0x1f" register "sata_clock_request" = "0" - register "sata_traffic_monitor" = "0" # Enable PCIe ports 0,2,3 as slots. register "pcie_slot_implemented" = "0xb" |