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authorMatt DeVillier <matt.devillier@puri.sm>2020-11-05 11:36:13 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-11-09 07:48:06 +0000
commitde10d8d6099a589ed60844fb28d1020577f64783 (patch)
tree97bbd383cfafd1e5154ee75c44573ec05f969b1d /src/mainboard
parent0e4f37f7a7c7812bf15b83fd841f22b497c41e9c (diff)
downloadcoreboot-de10d8d6099a589ed60844fb28d1020577f64783.tar.xz
mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe
The LAN NIC is onboard, not installed in a slot. Change-Id: I77ee7ee8c944b7942ca78d35cd881277c4030ab9 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47252 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
index e2135b7fa9..e8cc1e4f84 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
+++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
@@ -202,7 +202,6 @@ chip soc/intel/cannonlake
device pci 1d.0 off end # PCI Express Port 9
device pci 1d.1 on # PCI Express Port 10
device pci 00.0 on end # x1 (LAN)
- register "PcieRpSlotImplemented[9]" = "1"
register "PcieRpEnable[9]" = "1"
register "PcieClkSrcUsage[3]" = "9"
register "PcieClkSrcClkReq[3]" = "3"