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authorRaul E Rangel <rrangel@chromium.org>2021-05-05 13:41:24 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-05-06 23:32:12 +0000
commitf33f857fbe8e190c2972d4c466a3b7f96e03cd82 (patch)
tree1eb35a49fcd7963d0eacc36294795b02d78e2061 /src/mainboard
parent8317e727ce5d97626d7f59ac515d208502830ad1 (diff)
downloadcoreboot-f33f857fbe8e190c2972d4c466a3b7f96e03cd82.tar.xz
mb/google/guybrush: Switch eSPI ALERT# to in-band
Using the push-pull alert was causing leakages when in S0i3. This is because the EC drives ALERT#, so when the AP enters S0i3, the extra current leaks into the SoC and ends up turning on the power regulators. By using in-band ALERT#, the EC no longer drives this pin high, thus fixing the leak. We could also have used an open drain alert, but the rise time is less than ideal. BUG=b:187122344, b:186135022 TEST=Measure S0i3 power on guybrush and validate it's no longer high. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I6de771aeda8feca062652f0ea9eb57d31cb68562 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52955 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index 061b27550e..88a0a1cae5 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -35,7 +35,7 @@ chip soc/amd/cezanne
.io_mode = ESPI_IO_MODE_QUAD,
.op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
.crc_check_enable = 1,
- .alert_pin = ESPI_ALERT_PIN_PUSH_PULL,
+ .alert_pin = ESPI_ALERT_PIN_IN_BAND,
.periph_ch_en = 1,
.vw_ch_en = 1,
.oob_ch_en = 0,