diff options
author | huang lin <hl@rock-chips.com> | 2014-10-10 20:28:47 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@google.com> | 2015-04-04 15:05:12 +0200 |
commit | 08884e39cd3c7d0d0250e0e7921d12b5ae10ada1 (patch) | |
tree | 6c266022d90e3fcf3586b454257e41e7b7d62994 /src/mainboard | |
parent | 8affee58975f28e6a22fe3a474bd8bdd9a9cc05a (diff) | |
download | coreboot-08884e39cd3c7d0d0250e0e7921d12b5ae10ada1.tar.xz |
rk3288: set cpu frequency up to 1.8GHz
before the rkclk_init(), we must set rk808
buck1 voltage up to 1300mv
BUG=chrome-os-partner:32716, chrome-os-partner:31896
TEST=Boot on veyron_pinky rev2,check the rk808 buck1 voltage 1300mv
and check the cpu frequency up to 1.8GHz
Original-Change-Id: I6a8c6e35bd7cc6017f2def72876a9170977f206e
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/222957
Original-Reviewed-by: Doug Anderson <dianders@chromium.org>
(cherry picked from commit 2e7e7c265691250d4a1b3ff94fe70b0a05f23e16)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: Iff89d959456dd4d36f4293435caf7b4f7bdaf6fd
Reviewed-on: http://review.coreboot.org/9260
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/veyron_pinky/bootblock.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/mainboard/google/veyron_pinky/bootblock.c b/src/mainboard/google/veyron_pinky/bootblock.c index 3ed8e273c7..a66d7482d2 100644 --- a/src/mainboard/google/veyron_pinky/bootblock.c +++ b/src/mainboard/google/veyron_pinky/bootblock.c @@ -22,11 +22,24 @@ #include <bootblock_common.h> #include <soc/rockchip/rk3288/grf.h> #include <soc/rockchip/rk3288/spi.h> +#include <soc/rockchip/rk3288/rk808.h> +#include <soc/rockchip/rk3288/clock.h> +#include <soc/rockchip/rk3288/pmu.h> +#include <soc/rockchip/rk3288/i2c.h> #include <vendorcode/google/chromeos/chromeos.h> +#include "board.h" + void bootblock_mainboard_init(void) { - /* i2c1 for tpm*/ + /* cpu frequency will up to 1.8GHz, so the buck1 must up to 1.3v */ + setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); + setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); + i2c_init(PMIC_BUS, 400*KHz); + rk808_configure_buck(PMIC_BUS, 1, 1300); + rkclk_configure_cpu(); + + /* i2c1 for tpm */ writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1); /* spi2 for firmware ROM */ |