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authorDuncan Laurie <dlaurie@chromium.org>2014-11-03 15:46:59 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-04 12:40:21 +0200
commit09920e2de316751b9bbebad41e78404b025b79ec (patch)
tree5a395da47504be30eaec3644c26e03b6e832078e /src/mainboard
parent97acc5e88603ac82cd5bebc59b74f033d1e06096 (diff)
downloadcoreboot-09920e2de316751b9bbebad41e78404b025b79ec.tar.xz
samus: Enable GSPI0 interface
This will be connected to the coded for firmware upload. BUG=chrome-os-partner:33495 BRANCH=samus TEST=build and boot on samus, check that GSPI driver is loaded Change-Id: Ife41394e31af9dab03495b34609cb119525f9b19 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: bbf26154da675845251c54f71d1df9df8d2a4fd5 Original-Change-Id: I25c91145aef8ca2aef229ffb27e8a45df659982e Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/228835 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9273 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/samus/devicetree.cb2
-rw-r--r--src/mainboard/google/samus/gpio.h8
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb
index 4bbc3af84b..93ae51b8ff 100644
--- a/src/mainboard/google/samus/devicetree.cb
+++ b/src/mainboard/google/samus/devicetree.cb
@@ -70,7 +70,7 @@ chip soc/intel/broadwell
device pci 15.0 on end # Serial I/O DMA
device pci 15.1 on end # I2C0
device pci 15.2 on end # I2C1
- device pci 15.3 off end # GSPI0
+ device pci 15.3 on end # GSPI0
device pci 15.4 off end # GSPI1
device pci 15.5 off end # UART0
device pci 15.6 off end # UART1
diff --git a/src/mainboard/google/samus/gpio.h b/src/mainboard/google/samus/gpio.h
index 9f4031f1d6..99bdee6d09 100644
--- a/src/mainboard/google/samus/gpio.h
+++ b/src/mainboard/google/samus/gpio.h
@@ -111,10 +111,10 @@ static const struct gpio_config mainboard_gpio_config[] = {
PCH_GPIO_UNUSED, /* 80: UNUSED */
PCH_GPIO_UNUSED, /* 81: UNUSED */
PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */
- PCH_GPIO_UNUSED, /* 83: UNUSED */
- PCH_GPIO_UNUSED, /* 84: UNUSED */
- PCH_GPIO_UNUSED, /* 85: UNUSED */
- PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */
+ PCH_GPIO_NATIVE, /* 83: GSPI0_CS */
+ PCH_GPIO_NATIVE, /* 84: GSPI0_CLK */
+ PCH_GPIO_NATIVE, /* 85: GSPI0_MISO */
+ PCH_GPIO_NATIVE, /* 86: GSPI0_MOSI (STRAP) */
PCH_GPIO_UNUSED, /* 87: UNUSED */
PCH_GPIO_UNUSED, /* 88: UNUSED */
PCH_GPIO_OUT_HIGH, /* 89: PP3300_SD_EN */