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authorRudolf Marek <r.marek@assembler.cz>2008-12-04 23:37:12 +0000
committerRudolf Marek <r.marek@assembler.cz>2008-12-04 23:37:12 +0000
commit31e52e61aa4cbe3065ea86732a689ab4cf58984f (patch)
treeb7832dc8aa31f7ec64a6742b6be1f2017c9d935f /src/mainboard
parent1162f25a49e8f39822123d664cda10fef466b351 (diff)
downloadcoreboot-31e52e61aa4cbe3065ea86732a689ab4cf58984f.tar.xz
The patch changes the LDTSTOP length as well mostly default content of 0xec,
0xe4 and 0xe5 registers. I'm suspecting that the documentation may be wrong. Furthermore this fix for powernow may not work on CPUs hit by errata #181. Workaround should be implemented. The powernow may not work on pre-A2 revisions of VT8237S silicon, revision reg is unknown. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
index 7d30c0dcf6..2d79075f50 100644
--- a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
@@ -282,7 +282,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
print_debug("after enable_fid_change\r\n");
/* FIXME does not work yet */
-// init_fidvid_bsp(bsp_apicid);
+ init_fidvid_bsp(bsp_apicid);
/* Stop the APs so we can start them later in init. */
allow_all_aps_stop(bsp_apicid);