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authorNickey Yang <nickey.yang@rock-chips.com>2017-04-27 09:38:56 +0800
committerMartin Roth <martinroth@google.com>2017-05-05 22:50:12 +0200
commit39b633b26d6d4cf185fbbdd5a256d0665409bd5b (patch)
tree9ab227378311c0fa628fb7b2af169d251b6aea39 /src/mainboard
parent8caf8a23f93c5bc135133f257169116221f4f697 (diff)
downloadcoreboot-39b633b26d6d4cf185fbbdd5a256d0665409bd5b.tar.xz
google/scarlet: Enable innolux,p079zca MIPI panel
TEST=Boot from scarlet, and mipi panel work Change-Id: Id5f81867ea50f72cc0bc13074627134e0dc198ba Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Reviewed-on: https://review.coreboot.org/19476 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/gru/devicetree.scarlet.cb12
1 files changed, 11 insertions, 1 deletions
diff --git a/src/mainboard/google/gru/devicetree.scarlet.cb b/src/mainboard/google/gru/devicetree.scarlet.cb
index 2c316545f0..e5a9b318f6 100644
--- a/src/mainboard/google/gru/devicetree.scarlet.cb
+++ b/src/mainboard/google/gru/devicetree.scarlet.cb
@@ -15,6 +15,16 @@
chip soc/rockchip/rk3399
device cpu_cluster 0 on end
- register "vop_mode" = "VOP_MODE_NONE"
+ register "vop_mode" = "VOP_MODE_MIPI"
register "framebuffer_bits_per_pixel" = "32"
+ register "panel_pixel_clock" = "56900"
+ register "panel_refresh" = "60"
+ register "panel_ha" = "768"
+ register "panel_hbl" = "120"
+ register "panel_hso" = "40"
+ register "panel_hspw" = "40"
+ register "panel_va" = "1024"
+ register "panel_vbl" = "44"
+ register "panel_vso" = "20"
+ register "panel_vspw" = "4"
end