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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-08-26 21:24:21 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2017-08-27 13:22:46 +0000 |
| commit | 5bb27b7815b00ed789f474133eb52c73075a200f (patch) | |
| tree | 761b892addc33e77507f21b7954e37809b964e10 /src/mainboard | |
| parent | afa627db2ee414db4e31c64082bdee267e33af0b (diff) | |
| download | coreboot-5bb27b7815b00ed789f474133eb52c73075a200f.tar.xz | |
nb/intel/pineview: Fix typo in DRAM timing computation
This problem was introduced in:
12a4e98cea nb/intel/pineview/raminit: Refactor timings selection
Change-Id: Iace3dabb8546d7a721ef13526ba02522dc712fdd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/21214
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
0 files changed, 0 insertions, 0 deletions