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authorKrishna Prasad Bhat <krishna.p.bhat.d@intel.com>2019-05-14 14:42:10 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-05-20 14:42:27 +0000
commit811a51ac6757b30392385009579f5eddbd9540ab (patch)
treee7b4c22c47f32c12e03bb75247487c1d53b29504 /src/mainboard
parent20989630c417b1f0228f4c8eb6af7d715f5bdbcc (diff)
downloadcoreboot-811a51ac6757b30392385009579f5eddbd9540ab.tar.xz
mb/google/hatch: Change SD_CD# reset config to PLTRST
The system should boot fine to OS on pressing power button before the system enters G3. However, on hatch, we observe that the system waits for few seconds at "Starting kernel" and then resets, with SD card tray inserted and SD_CD# pad reset config set to DEEP. Hence configuring SD_CD# pad reset config to PLTRST. BUG=b:129933011 TEST=Built and verified on hatch. Change-Id: Ic4466b96332f095ff39b28d98607e95fc3d12d6a Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 32526cc74b..0b6607595d 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -339,7 +339,7 @@ static const struct pad_config gpio_table[] = {
/* G4 : SD_DATA3 */
PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
/* G5 : SD_CD# */
- PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
+ PAD_CFG_NF(GPP_G5, NONE, PLTRST, NF1),
/* G6 : SD_CLK */
PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1),
/* G7 : SD_WP => NC */