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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2020-04-20 15:20:55 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-04-22 13:48:04 +0000
commit9138eee4f7ed304a27fcb0028dd8865d79537374 (patch)
tree2d1c3c6088ed4d9178f8cc5f4d7ace077af6cdeb /src/mainboard
parentf3003657a036cd2193d0dee06815c708f67637ae (diff)
downloadcoreboot-9138eee4f7ed304a27fcb0028dd8865d79537374.tar.xz
mb/google/deltaur: Correct SPD SMBus address
SMBus uses 7-bits address, change it from 8-bits to 7-bits. BUG=b:151702387 TEST=Check Memory SPD data is correct in console log. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I1720b4d6aa0bc785ad86234b3523bb0676ec5c82 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40519 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/deltaur/variants/deltan/memory.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/deltaur/variants/deltan/memory.c b/src/mainboard/google/deltaur/variants/deltan/memory.c
index d51ba70431..0c5873f056 100644
--- a/src/mainboard/google/deltaur/variants/deltan/memory.c
+++ b/src/mainboard/google/deltaur/variants/deltan/memory.c
@@ -48,9 +48,9 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg)
{
const struct spd_info spd_info = {
.topology = SODIMM,
- .smbus_info[0] = {.addr_dimm0 = 0xa0,
+ .smbus_info[0] = {.addr_dimm0 = 0x50,
.addr_dimm1 = 0 },
- .smbus_info[1] = {.addr_dimm0 = 0xa4,
+ .smbus_info[1] = {.addr_dimm0 = 0x52,
.addr_dimm1 = 0 },
};
const bool half_populated = false;