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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-09-13 06:53:20 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-09-12 23:21:57 +0200
commita812643723419f4fe3f079731a9d10d2dc083aae (patch)
tree08de2d925ed12f9f263492eaea217cf16a62cd4b /src/mainboard
parentcf6f9b9464732b9deb862a60d0fa2b1fe1c8ae9f (diff)
downloadcoreboot-a812643723419f4fe3f079731a9d10d2dc083aae.tar.xz
mainboard/lenovo/t530: Enable PCIe Bridge for discrete graphics
Change-Id: I80f1e27268d0be58514d110611fd3c18cbe81829 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6895 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/lenovo/t530/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index 7d9754f517..ec9041d92c 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -40,7 +40,7 @@ chip northbridge/intel/sandybridge
device domain 0 on
device pci 00.0 on end # host bridge
- device pci 01.0 off end # PCIe Bridge for discrete graphics
+ device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH