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authorLijian Zhao <lijian.zhao@intel.com>2017-09-14 14:48:55 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-03 20:23:47 +0000
commitc1a49286092affa2ba39ceed51a09547fa60aa07 (patch)
tree9ef639072246a0fbe05f238e2dbd8ac932a209cd /src/mainboard
parentf0eb99996d0baa7b0c09027f542a17d01c570a47 (diff)
downloadcoreboot-c1a49286092affa2ba39ceed51a09547fa60aa07.tar.xz
mainboard/intel/cannonlake_rvp: Add smi support in board
Include SMI Handler support for Cannonlake RVP platform. Change-Id: I8f363e20a6eb92b3c05e16715aa052a8da18b509 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21542 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Kconfig1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Makefile.inc1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/smihandler.c42
3 files changed, 44 insertions, 0 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig
index f572f277d7..185825802a 100644
--- a/src/mainboard/intel/cannonlake_rvp/Kconfig
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig
@@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384
select SOC_INTEL_CANNONLAKE
+ select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_CHROMEOS
select GENERIC_SPD_BIN
diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
index 30be69933e..247f1719b8 100644
--- a/src/mainboard/intel/cannonlake_rvp/Makefile.inc
+++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
@@ -25,6 +25,7 @@ romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
subdirs-y += variants/baseboard
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
diff --git a/src/mainboard/intel/cannonlake_rvp/smihandler.c b/src/mainboard/intel/cannonlake_rvp/smihandler.c
new file mode 100644
index 0000000000..0f05351bae
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/smihandler.c
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2017 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <intelblocks/smihandler.h>
+#include <soc/nvs.h>
+
+int mainboard_io_trap_handler(int smif)
+{
+ switch (smif) {
+ case 0x99:
+ printk(BIOS_DEBUG, "Sample\n");
+ smm_get_gnvs()->smif = 0;
+ break;
+ default:
+ return 0;
+ }
+
+ /* On success, the IO Trap Handler returns 0
+ * On failure, the IO Trap Handler returns a value != 0
+ *
+ * For now, we force the return value to 0 and log all traps to
+ * see what's going on.
+ */
+ return 1;
+}