summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2018-10-14 13:21:02 +0200
committerFelix Held <felix-coreboot@felixheld.de>2018-10-15 12:51:18 +0000
commitde82ac77356c3b670493755b32bdad24729461c4 (patch)
tree7cd146bd8c9269a44ac88732355f4f7bc55c707e /src/mainboard
parent8ddd7d1e5eee9e3e604624622d9b91f9b99306ff (diff)
downloadcoreboot-de82ac77356c3b670493755b32bdad24729461c4.tar.xz
sb/intel/i82801jx: Use macros for LPC_EN
Change-Id: I4a9a9366c85206fa460519a26f48b3aada5bc7c3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/29100 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/dg43gt/romstage.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c
index 64b462fb8c..36aa1498b5 100644
--- a/src/mainboard/intel/dg43gt/romstage.c
+++ b/src/mainboard/intel/dg43gt/romstage.c
@@ -60,7 +60,10 @@ static void ich10_enable_lpc(void)
{
/* Configure serial IRQs.*/
pci_write_config16(LPC_DEV, D31F0_LPC_IODEC, 0x0010);
- pci_write_config16(LPC_DEV, D31F0_LPC_EN, 0x3f0f);
+ pci_write_config16(LPC_DEV, D31F0_LPC_EN, CNF2_LPC_EN | CNF1_LPC_EN
+ | MC_LPC_EN | KBC_LPC_EN | GAMEH_LPC_EN
+ | GAMEL_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
+ | COMB_LPC_EN | COMA_LPC_EN);
pci_write_config32(LPC_DEV, D31F0_GEN1_DEC, 0xfc0601);
pci_write_config32(LPC_DEV, D31F0_GEN2_DEC, 0xfc0291);
pci_write_config32(LPC_DEV, D31F0_GEN3_DEC, 0);