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authorWisley Chen <wisley.chen@quantatw.com>2020-04-24 19:04:09 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-04-25 19:27:58 +0000
commitfadd6353dbe72bec79888b37385df7f5877ddc1a (patch)
tree07d45b2f57d35e16b4a62aaef195e12022cc2962 /src/mainboard
parentb45912f453b52bfc01e66dc070fb33fad236d816 (diff)
downloadcoreboot-fadd6353dbe72bec79888b37385df7f5877ddc1a.tar.xz
mb/google/hatch/var/jinlon: Tune i2c frequency under 400 KHz
Tuning i2c frequency for jinlon: I2C0: 392.7 KHz I2C1: 390 KHz I2C3: unused I2C4: 388.8 KHz BUG=b:154900217 BRANCH=hatch TEST=emerge-hatch coreboot chromeos-bootimage, and measured with scope Change-Id: I9b186193f34027d03dd349cf1e29bb266b167383 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40688 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/overridetree.cb9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index 7cf434dd91..546267011d 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -46,15 +46,18 @@ chip soc/intel/cannonlake
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
+ .rise_time_ns = 30,
+ .fall_time_ns = 15,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
- },
- .i2c[3] = {
- .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 20,
+ .fall_time_ns = 25,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
+ .rise_time_ns = 40,
+ .fall_time_ns = 60,
},
}"