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authorHung-Te Lin <hungte@chromium.org>2013-08-06 20:37:55 +0800
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-07-31 18:31:53 +0200
commit0682cfefdb888807bef6ee7f3bb81615282e0390 (patch)
treeebf77bbb06c2c326d0aa3ab7e0390069d8118cb5 /src/mainboard
parentc3fda416a7e71eae4803c07f0fae4b0b931d1ca8 (diff)
downloadcoreboot-0682cfefdb888807bef6ee7f3bb81615282e0390.tar.xz
armv7/exynos5420: Configure CPU cores for kernel to enable SMP.
The SMP on Exynos 5420 requires setting a special page and entry wrappers in firmware side (SRAM) so kernel can start cores (and to switch clusters). Change-Id: I77ca98bb6cff5b13e95dd29228e4536302f0aee9 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/64770 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> (cherry picked from commit 4a11c7ab78cc0811df0f88763b0af8b9f24e5433) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/pit/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index 7733eca1c7..7037112d04 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -246,6 +246,7 @@ void main(void)
int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
int power_init_failed;
+ exynos5420_config_smp();
power_init_failed = setup_power(is_resume);
/* Clock must be initialized before console_init, otherwise you may need