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author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-12-07 13:10:01 +0100 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-12-07 14:01:56 +0100 |
commit | 1a3ee668c79ae117738aa44c690471778a014fd8 (patch) | |
tree | d73e6486ad9840af0f9773339888a789ada39d0f /src/mainboard | |
parent | 25fc532838f55938b59ad4337990c487ac663cc7 (diff) | |
download | coreboot-1a3ee668c79ae117738aa44c690471778a014fd8.tar.xz |
x200/romstage: Add missing include.
Change-Id: I47aa8619ba1e1939707ec654ffb54cae316929cf
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7684
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/lenovo/x200/romstage.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c index 1c0668fb99..f232642871 100644 --- a/src/mainboard/lenovo/x200/romstage.c +++ b/src/mainboard/lenovo/x200/romstage.c @@ -33,6 +33,7 @@ #include <console/console.h> #include <southbridge/intel/i82801ix/i82801ix.h> #include <northbridge/intel/gm45/gm45.h> +#include <cpu/intel/romstage.h> #define LPC_DEV PCI_DEV(0, 0x1f, 0) #define MCH_DEV PCI_DEV(0, 0, 0) |