EPIA-M fixup

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

10 files changed, 1299 insertions, 21 deletions

diff --git a/src/mainboard/via/epia-m/Config.lb b/src/mainboard/via/epia-m/Config.lb
index decbd0e3b1..6dc4b3d79a 100644
--- a/src/mainboard/via/epia-m/Config.lb
+++ b/src/mainboard/via/epia-m/Config.lb
@@ -45,6 +45,7 @@ arch i386 end
 driver mainboard.o
 if HAVE_PIRQ_TABLE object irq_tables.o end
 #object reset.o
+object vgabios.o
 
 if HAVE_ACPI_TABLES
 	object fadt.o
@@ -133,11 +134,6 @@ config chip.h
 chip northbridge/via/vt8623
 	device pci_domain 0 on
 		chip southbridge/via/vt8235
-			register "enable_usb" = "0"
-			register "enable_native_ide" = "0"
-			register "enable_com_ports" = "1"
-			register "enable_keyboard" = "0"
-			register "enable_nvram" = "1"
 
 			device pci 10.0 on end # USB 1.1
 			device pci 10.1 on end # USB 1.1
@@ -151,7 +147,7 @@ chip northbridge/via/vt8623
 						irq 0x70 = 6
 						drq 0x74 = 2
 					end
-					device pnp 2e.1 off	# Parallel Port
+					device pnp 2e.1 on	# Parallel Port
 						io 0x60 = 0x378
 						irq 0x70 = 7
 						drq 0x74 = 3
@@ -178,10 +174,16 @@ chip northbridge/via/vt8623
 			device pci 12.0 on end  # Ethernet
 		end
 #		This is on the EPIA MII, not the M.
-#		chip southbridge/ricoh/rl5c476
-#		end
+		chip southbridge/ricoh/rl5c476
+			register "enable_cf" = "1"
+			device pci 0a.0 on end
+			device pci 0a.1 on end	
+		end
 	end
 
-	chip cpu/via/model_centaur 
+	device apic_cluster 0 on
+		chip cpu/via/model_centaur
+			device apic 0 on  end 
+		end
 	end
 end
diff --git a/src/mainboard/via/epia-m/Options.lb b/src/mainboard/via/epia-m/Options.lb
index 4184236c5c..6c3193e78d 100644
--- a/src/mainboard/via/epia-m/Options.lb
+++ b/src/mainboard/via/epia-m/Options.lb
@@ -36,6 +36,8 @@ uses DEFAULT_CONSOLE_LOGLEVEL
 uses MAXIMUM_CONSOLE_LOGLEVEL
 uses CONFIG_CONSOLE_SERIAL8250
 uses CONFIG_UDELAY_TSC
+uses CONFIG_PCI_ROM_RUN
+uses CONFIG_CONSOLE_VGA
 
 ## ROM_SIZE is the size of boot ROM that this board will use.
 default ROM_SIZE  = 256*1024
@@ -43,6 +45,8 @@ default ROM_SIZE  = 256*1024
 ###
 ### Build options
 ###
+default CONFIG_PCI_ROM_RUN=0
+default CONFIG_CONSOLE_VGA=0
 
 ##
 ## Build code for the fallback boot
@@ -70,6 +74,13 @@ default HAVE_HARD_RESET=1
 default HAVE_PIRQ_TABLE=1
 default IRQ_SLOT_COUNT=5
 
+
+##
+## Build code to load acpi tables
+##
+default HAVE_ACPI_TABLES=1
+
+
 ##
 ## Build code to export a CMOS option table
 ##
diff --git a/src/mainboard/via/epia-m/auto.c b/src/mainboard/via/epia-m/auto.c
index 7d08de87bb..c69b7bf101 100644
--- a/src/mainboard/via/epia-m/auto.c
+++ b/src/mainboard/via/epia-m/auto.c
@@ -68,7 +68,7 @@ static void enable_mainboard_devices(void)
 		die("Southbridge not found!!!\n");
 	}
 	pci_write_config8(dev, 0x50, 0x80);
-	pci_write_config8(dev, 0x51, 0x1F);
+	pci_write_config8(dev, 0x51, 0x1f);
 #if 0
 	// This early setup switches IDE into compatibility mode before PCI gets 
 	// // a chance to assign I/Os
@@ -141,14 +141,8 @@ static void main(unsigned long bist)
 
 	print_debug(" Enabling shadow ram\r\n");
 	enable_shadow_ram();
-	/*
-	  memreset_setup();
-	  this is way more generic than we need.
-	  sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
-	*/
-	sdram_set_registers((const struct mem_controller *) 0);
-	sdram_set_spd_registers((const struct mem_controller *) 0);
-	sdram_enable(0, (const struct mem_controller *) 0);
+
+	ddr_ram_setup((const struct mem_controller *)0);
 	
 	/* Check all of memory */
 #if 0
diff --git a/src/mainboard/via/epia-m/dsdt.asl b/src/mainboard/via/epia-m/dsdt.asl
new file mode 100644
index 0000000000..2fcb77ed3a
--- /dev/null
+++ b/src/mainboard/via/epia-m/dsdt.asl
@@ -0,0 +1,256 @@
+/*
+ * Minimalist ACPI DSDT table for EPIA-M / MII
+ * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
+ *
+ * 
+ */
+
+DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
+{
+	/*  
+	 * Define the main processor
+	 */
+	Scope (\_PR)
+	{
+		Processor (\_PR.CPU0, 0x00, 0x00000410, 0x06) {}
+	}
+
+	/* For now only define 2 power states:
+	 *  - S0 which is fully on
+	 *  - S5 which is soft off
+	 * any others would involve declaring the wake up methods
+	 */
+	Name (\_S0, Package () {0x00, 0x00, 0x00, 0x00 })
+	Name (\_S5, Package () {0x02, 0x02, 0x00, 0x00 })
+
+	/* Root of the bus hierarchy */
+	Scope (\_SB)
+    	{
+		/* Define how interrupt Link A is plumbed in */ 
+		Device (LNKA)
+		{
+			Name (_HID, EisaId ("PNP0C0F"))
+			Name (_UID, 0x01)
+			/* Status - always return ready */
+			Method (_STA, 0, NotSerialized)
+			{
+				Return (0x0B)
+ 			}
+			/* Current Resources - return irq set up in BIOS */  
+			Method (_CRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+				{
+					IRQ (Level, ActiveLow, Shared) {5}
+				})
+				Return (BUFF)
+                	}
+			/* Possible Resources - return the range of irqs
+ 			 * we are using for PCI - only here to keep Linux ACPI
+			 * happy 
+			 */
+			Method (_PRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+                    		{
+					IRQ (Level, ActiveLow, Shared) {5,9,10}
+                    		})
+                    		Return (BUFF)
+                	}
+			/* Set Resources - dummy function to keep Linux ACPI happy
+                         * Linux is more than happy not to tinker with irq
+			 * assignments as long as the CRS and STA functions 
+			 * return good values
+			 */
+			Method (_SRS, 1, NotSerialized ) {}
+			/* Disable - dummy function to keep Linux ACPI happy */
+			Method (_DIS, 0, NotSerialized ) {}
+ 
+		} // End of LNKA 
+
+		/* Define how interrupt Link B is plumbed in */ 
+		Device (LNKB)
+		{
+			Name (_HID, EisaId ("PNP0C0F"))
+			Name (_UID, 0x02)
+			/* Status - always return ready */
+			Method (_STA, 0, NotSerialized)
+			{
+				Return (0x0B)
+ 			}
+			/* Current Resources - return irq set up in BIOS */  
+			Method (_CRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+				{
+					IRQ (Level, ActiveLow, Shared) {9}
+				})
+				Return (BUFF)
+                	}
+			/* Possible Resources - return the range of irqs
+			 * we are using for PCI - only here to keep Linux ACPI
+			 * happy 
+			 */
+			Method (_PRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+                    		{
+					IRQ (Level, ActiveLow, Shared) {5,9,10}
+                    		})
+                    		Return (BUFF)
+                	}
+			/* Set Resources - dummy function to keep Linux ACPI happy
+                         * Linux is more than happy not to tinker with irq
+			 * assignments as long as the CRS and STA functions 
+			 * return good values
+			 */
+			Method (_SRS, 1, NotSerialized ) {}
+			/* Disable - dummy function to keep Linux ACPI happy */
+			Method (_DIS, 0, NotSerialized ) {}
+ 
+		} // End of LNKB
+
+		/* Define how interrupt Link C is plumbed in */ 
+		Device (LNKC)
+		{
+			Name (_HID, EisaId ("PNP0C0F"))
+			Name (_UID, 0x03)
+			/* Status - always return ready */
+			Method (_STA, 0, NotSerialized)
+			{
+				Return (0x0B)
+ 			}
+			/* Current Resources - return irq set up in BIOS */  
+			Method (_CRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+				{
+					IRQ (Level, ActiveLow, Shared) {9}
+				})
+				Return (BUFF)
+                	}
+			/* Possible Resources - return the range of irqs
+			 * we are using for PCI - only here to keep Linux ACPI
+			 * happy 
+			 */
+			Method (_PRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+                    		{
+					IRQ (Level, ActiveLow, Shared) {5,9,10}
+                    		})
+                    		Return (BUFF)
+                	}
+			/* Set Resources - dummy function to keep Linux ACPI happy
+                         * Linux is more than happy not to tinker with irq
+			 * assignments as long as the CRS and STA functions 
+			 * return good values
+			 */
+			Method (_SRS, 1, NotSerialized ) {}
+			/* Disable - dummy function to keep Linux ACPI happy */
+			Method (_DIS, 0, NotSerialized ) {}
+ 
+		} // End of LNKC
+
+		/* Define how interrupt Link D is plumbed in */ 
+		Device (LNKD)
+		{
+			Name (_HID, EisaId ("PNP0C0F"))
+			Name (_UID, 0x04)
+			/* Status - always return ready */
+			Method (_STA, 0, NotSerialized)
+			{
+				Return (0x0B)
+ 			}
+			/* Current Resources - return irq set up in BIOS */  
+			Method (_CRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+				{
+					IRQ (Level, ActiveLow, Shared) {5}
+				})
+				Return (BUFF)
+                	}
+			/* Possible Resources - return the range of irqs
+			 * we are using for PCI - only here to keep Linux ACPI
+			 * happy 
+			 */
+			Method (_PRS, 0, NotSerialized)
+			{
+				Name (BUFF, ResourceTemplate ()
+                    		{
+					IRQ (Level, ActiveLow, Shared) {5,9,10}
+                    		})
+                    		Return (BUFF)
+                	}
+			/* Set Resources - dummy function to keep Linux ACPI happy
+                         * Linux is more than happy not to tinker with irq
+			 * assignments as long as the CRS and STA functions 
+			 * return good values
+			 */
+			Method (_SRS, 1, NotSerialized ) {}
+			/* Disable - dummy function to keep Linux ACPI happy */
+			Method (_DIS, 0, NotSerialized ) {}
+ 
+		} // End of LNKD 
+
+ 
+		/* top PCI device */
+		Device (PCI0)
+		{
+			Name (_HID, EisaId ("PNP0A03"))
+			Name (_ADR, 0x00)
+			Name (_UID, 0x00)
+			Name (_BBN, 0x00)
+
+			/* PCI Routing Table */
+			Name (_PRT, Package () {
+				Package () {0x000AFFFF, 0x00, LNKD, 0x00}, // Cardbus Link D
+				Package () {0x000AFFFF, 0x01, LNKA, 0x00}, // Cardbus Link A 
+				Package () {0x000AFFFF, 0x02, LNKB, 0x00}, // Cardbus Link B
+				Package () {0x000AFFFF, 0x03, LNKC, 0x00}, // Cardbus Link C
+
+				Package () {0x000DFFFF, 0x00, LNKB, 0x00}, // Firewire Link B
+				Package () {0x000DFFFF, 0x01, LNKC, 0x00}, // Firewire Link C
+				Package () {0x000DFFFF, 0x02, LNKD, 0x00}, // Firewire Linc D
+				Package () {0x000DFFFF, 0x03, LNKA, 0x00}, // Firewire Link A
+
+				Package () {0x0010FFFF, 0x00, LNKA, 0x00}, // USB Link A
+				Package () {0x0010FFFF, 0x01, LNKB, 0x00}, // USB Link B
+				Package () {0x0010FFFF, 0x02, LNKC, 0x00}, // USB Link C
+				Package () {0x0010FFFF, 0x03, LNKD, 0x00}, // USB Link D
+
+				Package () {0x0011FFFF, 0x00, LNKA, 0x00}, // vt8623 Link A
+				Package () {0x0011FFFF, 0x01, LNKB, 0x00}, // vt8623 Link B
+				Package () {0x0011FFFF, 0x02, LNKC, 0x00}, // vt8623 Link C
+				Package () {0x0011FFFF, 0x03, LNKD, 0x00}, // vt8623 Link D
+
+				Package () {0x0012FFFF, 0x00, LNKA, 0x00}, // LAN Link A 
+				Package () {0x0012FFFF, 0x01, LNKB, 0x00}, // LAN Link B
+				Package () {0x0012FFFF, 0x02, LNKC, 0x00}, // LAN Link C
+				Package () {0x0012FFFF, 0x03, LNKD, 0x00}, // LAN Link D
+
+				Package () {0x0013FFFF, 0x00, LNKA, 0x00}, // Riser slot LinkA 
+				Package () {0x0013FFFF, 0x01, LNKB, 0x00}, // Riser slot LinkB
+				Package () {0x0013FFFF, 0x02, LNKC, 0x00}, // Riser slot LinkC
+				Package () {0x0013FFFF, 0x03, LNKD, 0x00}, // Riser slot LinkD
+
+				Package () {0x0014FFFF, 0x00, LNKB, 0x00}, // Slot 1, Link B
+				Package () {0x0014FFFF, 0x01, LNKC, 0x00}, // Slot 1, Link C
+				Package () {0x0014FFFF, 0x02, LNKD, 0x00}, // Slot 1, Link D
+				Package () {0x0014FFFF, 0x03, LNKA, 0x00}, // Slot 1, Link A
+                
+				Package () {0x0001FFFF, 0x00, LNKA, 0x00}, // VGA Link A
+				Package () {0x0001FFFF, 0x01, LNKB, 0x00}, // VGA Link B
+				Package () {0x0001FFFF, 0x02, LNKC, 0x00}, // VGA Link C
+				Package () {0x0001FFFF, 0x03, LNKD, 0x00} // VGA Link D
+
+            		})
+
+
+		} // End of PCI0
+
+	} // End of _SB
+
+} // End of Definition Block
+
diff --git a/src/mainboard/via/epia-m/dsdt.c b/src/mainboard/via/epia-m/dsdt.c
new file mode 100644
index 0000000000..62b0f3dab0
--- /dev/null
+++ b/src/mainboard/via/epia-m/dsdt.c
@@ -0,0 +1,142 @@
+/*
+ * 
+ * Intel ACPI Component Architecture
+ * ASL Optimizing Compiler / AML Disassembler version 20040715 [Aug 16 2004]
+ * Copyright (C) 2000 - 2004 Intel Corporation
+ * Supports ACPI Specification Revision 2.0c
+ * 
+ * Compilation of "dsdt.asl" - Thu Oct 27 09:25:57 2005
+ * 
+ * C source code output
+ *
+ */
+unsigned char AmlCode[] = 
+{
+    0x44,0x53,0x44,0x54,0xF0,0x03,0x00,0x00,  /* 00000000    "DSDT...." */
+    0x01,0x11,0x4C,0x58,0x42,0x49,0x4F,0x53,  /* 00000008    "..LXBIOS" */
+    0x4C,0x58,0x42,0x2D,0x44,0x53,0x44,0x54,  /* 00000010    "LXB-DSDT" */
+    0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C,  /* 00000018    "....INTL" */
+    0x15,0x07,0x04,0x20,0x10,0x12,0x5F,0x50,  /* 00000020    "... .._P" */
+    0x52,0x5F,0x5B,0x83,0x0B,0x43,0x50,0x55,  /* 00000028    "R_[..CPU" */
+    0x30,0x00,0x10,0x04,0x00,0x00,0x06,0x08,  /* 00000030    "0......." */
+    0x5F,0x53,0x30,0x5F,0x12,0x06,0x04,0x00,  /* 00000038    "_S0_...." */
+    0x00,0x00,0x00,0x08,0x5F,0x53,0x35,0x5F,  /* 00000040    "...._S5_" */
+    0x12,0x08,0x04,0x0A,0x02,0x0A,0x02,0x00,  /* 00000048    "........" */
+    0x00,0x10,0x4E,0x39,0x5F,0x53,0x42,0x5F,  /* 00000050    "..N9_SB_" */
+    0x5B,0x82,0x44,0x06,0x4C,0x4E,0x4B,0x41,  /* 00000058    "[.D.LNKA" */
+    0x08,0x5F,0x48,0x49,0x44,0x0C,0x41,0xD0,  /* 00000060    "._HID.A." */
+    0x0C,0x0F,0x08,0x5F,0x55,0x49,0x44,0x01,  /* 00000068    "..._UID." */
+    0x14,0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,  /* 00000070    ".._STA.." */
+    0x0A,0x0B,0x14,0x1A,0x5F,0x43,0x52,0x53,  /* 00000078    "...._CRS" */
+    0x00,0x08,0x42,0x55,0x46,0x46,0x11,0x09,  /* 00000080    "..BUFF.." */
+    0x0A,0x06,0x23,0x20,0x00,0x18,0x79,0x00,  /* 00000088    "..# ..y." */
+    0xA4,0x42,0x55,0x46,0x46,0x14,0x1A,0x5F,  /* 00000090    ".BUFF.._" */
+    0x50,0x52,0x53,0x00,0x08,0x42,0x55,0x46,  /* 00000098    "PRS..BUF" */
+    0x46,0x11,0x09,0x0A,0x06,0x23,0x20,0x06,  /* 000000A0    "F....# ." */
+    0x18,0x79,0x00,0xA4,0x42,0x55,0x46,0x46,  /* 000000A8    ".y..BUFF" */
+    0x14,0x06,0x5F,0x53,0x52,0x53,0x01,0x14,  /* 000000B0    ".._SRS.." */
+    0x06,0x5F,0x44,0x49,0x53,0x00,0x5B,0x82,  /* 000000B8    "._DIS.[." */
+    0x45,0x06,0x4C,0x4E,0x4B,0x42,0x08,0x5F,  /* 000000C0    "E.LNKB._" */
+    0x48,0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F,  /* 000000C8    "HID.A..." */
+    0x08,0x5F,0x55,0x49,0x44,0x0A,0x02,0x14,  /* 000000D0    "._UID..." */
+    0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A,  /* 000000D8    "._STA..." */
+    0x0B,0x14,0x1A,0x5F,0x43,0x52,0x53,0x00,  /* 000000E0    "..._CRS." */
+    0x08,0x42,0x55,0x46,0x46,0x11,0x09,0x0A,  /* 000000E8    ".BUFF..." */
+    0x06,0x23,0x00,0x02,0x18,0x79,0x00,0xA4,  /* 000000F0    ".#...y.." */
+    0x42,0x55,0x46,0x46,0x14,0x1A,0x5F,0x50,  /* 000000F8    "BUFF.._P" */
+    0x52,0x53,0x00,0x08,0x42,0x55,0x46,0x46,  /* 00000100    "RS..BUFF" */
+    0x11,0x09,0x0A,0x06,0x23,0x20,0x06,0x18,  /* 00000108    "....# .." */
+    0x79,0x00,0xA4,0x42,0x55,0x46,0x46,0x14,  /* 00000110    "y..BUFF." */
+    0x06,0x5F,0x53,0x52,0x53,0x01,0x14,0x06,  /* 00000118    "._SRS..." */
+    0x5F,0x44,0x49,0x53,0x00,0x5B,0x82,0x45,  /* 00000120    "_DIS.[.E" */
+    0x06,0x4C,0x4E,0x4B,0x43,0x08,0x5F,0x48,  /* 00000128    ".LNKC._H" */
+    0x49,0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,  /* 00000130    "ID.A...." */
+    0x5F,0x55,0x49,0x44,0x0A,0x03,0x14,0x09,  /* 00000138    "_UID...." */
+    0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A,0x0B,  /* 00000140    "_STA...." */
+    0x14,0x1A,0x5F,0x43,0x52,0x53,0x00,0x08,  /* 00000148    ".._CRS.." */
+    0x42,0x55,0x46,0x46,0x11,0x09,0x0A,0x06,  /* 00000150    "BUFF...." */
+    0x23,0x00,0x02,0x18,0x79,0x00,0xA4,0x42,  /* 00000158    "#...y..B" */
+    0x55,0x46,0x46,0x14,0x1A,0x5F,0x50,0x52,  /* 00000160    "UFF.._PR" */
+    0x53,0x00,0x08,0x42,0x55,0x46,0x46,0x11,  /* 00000168    "S..BUFF." */
+    0x09,0x0A,0x06,0x23,0x20,0x06,0x18,0x79,  /* 00000170    "...# ..y" */
+    0x00,0xA4,0x42,0x55,0x46,0x46,0x14,0x06,  /* 00000178    "..BUFF.." */
+    0x5F,0x53,0x52,0x53,0x01,0x14,0x06,0x5F,  /* 00000180    "_SRS..._" */
+    0x44,0x49,0x53,0x00,0x5B,0x82,0x45,0x06,  /* 00000188    "DIS.[.E." */
+    0x4C,0x4E,0x4B,0x44,0x08,0x5F,0x48,0x49,  /* 00000190    "LNKD._HI" */
+    0x44,0x0C,0x41,0xD0,0x0C,0x0F,0x08,0x5F,  /* 00000198    "D.A...._" */
+    0x55,0x49,0x44,0x0A,0x04,0x14,0x09,0x5F,  /* 000001A0    "UID...._" */
+    0x53,0x54,0x41,0x00,0xA4,0x0A,0x0B,0x14,  /* 000001A8    "STA....." */
+    0x1A,0x5F,0x43,0x52,0x53,0x00,0x08,0x42,  /* 000001B0    "._CRS..B" */
+    0x55,0x46,0x46,0x11,0x09,0x0A,0x06,0x23,  /* 000001B8    "UFF....#" */
+    0x20,0x00,0x18,0x79,0x00,0xA4,0x42,0x55,  /* 000001C0    " ..y..BU" */
+    0x46,0x46,0x14,0x1A,0x5F,0x50,0x52,0x53,  /* 000001C8    "FF.._PRS" */
+    0x00,0x08,0x42,0x55,0x46,0x46,0x11,0x09,  /* 000001D0    "..BUFF.." */
+    0x0A,0x06,0x23,0x20,0x06,0x18,0x79,0x00,  /* 000001D8    "..# ..y." */
+    0xA4,0x42,0x55,0x46,0x46,0x14,0x06,0x5F,  /* 000001E0    ".BUFF.._" */
+    0x53,0x52,0x53,0x01,0x14,0x06,0x5F,0x44,  /* 000001E8    "SRS..._D" */
+    0x49,0x53,0x00,0x5B,0x82,0x4B,0x1F,0x50,  /* 000001F0    "IS.[.K.P" */
+    0x43,0x49,0x30,0x08,0x5F,0x48,0x49,0x44,  /* 000001F8    "CI0._HID" */
+    0x0C,0x41,0xD0,0x0A,0x03,0x08,0x5F,0x41,  /* 00000200    ".A...._A" */
+    0x44,0x52,0x00,0x08,0x5F,0x55,0x49,0x44,  /* 00000208    "DR.._UID" */
+    0x00,0x08,0x5F,0x42,0x42,0x4E,0x00,0x08,  /* 00000210    ".._BBN.." */
+    0x5F,0x50,0x52,0x54,0x12,0x43,0x1D,0x20,  /* 00000218    "_PRT.C. " */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x0A,0x00,  /* 00000220    "........" */
+    0x00,0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D,  /* 00000228    ".LNKD..." */
+    0x04,0x0C,0xFF,0xFF,0x0A,0x00,0x01,0x4C,  /* 00000230    ".......L" */
+    0x4E,0x4B,0x41,0x00,0x12,0x0E,0x04,0x0C,  /* 00000238    "NKA....." */
+    0xFF,0xFF,0x0A,0x00,0x0A,0x02,0x4C,0x4E,  /* 00000240    "......LN" */
+    0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000248    "KB......" */
+    0xFF,0x0A,0x00,0x0A,0x03,0x4C,0x4E,0x4B,  /* 00000250    ".....LNK" */
+    0x43,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000258    "C......." */
+    0x0D,0x00,0x00,0x4C,0x4E,0x4B,0x42,0x00,  /* 00000260    "...LNKB." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x0D,0x00,  /* 00000268    "........" */
+    0x01,0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,  /* 00000270    ".LNKC..." */
+    0x04,0x0C,0xFF,0xFF,0x0D,0x00,0x0A,0x02,  /* 00000278    "........" */
+    0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0E,0x04,  /* 00000280    "LNKD...." */
+    0x0C,0xFF,0xFF,0x0D,0x00,0x0A,0x03,0x4C,  /* 00000288    ".......L" */
+    0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,  /* 00000290    "NKA....." */
+    0xFF,0xFF,0x10,0x00,0x00,0x4C,0x4E,0x4B,  /* 00000298    ".....LNK" */
+    0x41,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 000002A0    "A......." */
+    0x10,0x00,0x01,0x4C,0x4E,0x4B,0x42,0x00,  /* 000002A8    "...LNKB." */
+    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x10,0x00,  /* 000002B0    "........" */
+    0x0A,0x02,0x4C,0x4E,0x4B,0x43,0x00,0x12,  /* 000002B8    "..LNKC.." */
+    0x0E,0x04,0x0C,0xFF,0xFF,0x10,0x00,0x0A,  /* 000002C0    "........" */
+    0x03,0x4C,0x4E,0x4B,0x44,0x00,0x12,0x0D,  /* 000002C8    ".LNKD..." */
+    0x04,0x0C,0xFF,0xFF,0x11,0x00,0x00,0x4C,  /* 000002D0    ".......L" */
+    0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,  /* 000002D8    "NKA....." */
+    0xFF,0xFF,0x11,0x00,0x01,0x4C,0x4E,0x4B,  /* 000002E0    ".....LNK" */
+    0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 000002E8    "B......." */
+    0x11,0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x43,  /* 000002F0    "....LNKC" */
+    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x11,  /* 000002F8    "........" */
+    0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x44,0x00,  /* 00000300    "...LNKD." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x12,0x00,  /* 00000308    "........" */
+    0x00,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,  /* 00000310    ".LNKA..." */
+    0x04,0x0C,0xFF,0xFF,0x12,0x00,0x01,0x4C,  /* 00000318    ".......L" */
+    0x4E,0x4B,0x42,0x00,0x12,0x0E,0x04,0x0C,  /* 00000320    "NKB....." */
+    0xFF,0xFF,0x12,0x00,0x0A,0x02,0x4C,0x4E,  /* 00000328    "......LN" */
+    0x4B,0x43,0x00,0x12,0x0E,0x04,0x0C,0xFF,  /* 00000330    "KC......" */
+    0xFF,0x12,0x00,0x0A,0x03,0x4C,0x4E,0x4B,  /* 00000338    ".....LNK" */
+    0x44,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000340    "D......." */
+    0x13,0x00,0x00,0x4C,0x4E,0x4B,0x41,0x00,  /* 00000348    "...LNKA." */
+    0x12,0x0D,0x04,0x0C,0xFF,0xFF,0x13,0x00,  /* 00000350    "........" */
+    0x01,0x4C,0x4E,0x4B,0x42,0x00,0x12,0x0E,  /* 00000358    ".LNKB..." */
+    0x04,0x0C,0xFF,0xFF,0x13,0x00,0x0A,0x02,  /* 00000360    "........" */
+    0x4C,0x4E,0x4B,0x43,0x00,0x12,0x0E,0x04,  /* 00000368    "LNKC...." */
+    0x0C,0xFF,0xFF,0x13,0x00,0x0A,0x03,0x4C,  /* 00000370    ".......L" */
+    0x4E,0x4B,0x44,0x00,0x12,0x0D,0x04,0x0C,  /* 00000378    "NKD....." */
+    0xFF,0xFF,0x14,0x00,0x00,0x4C,0x4E,0x4B,  /* 00000380    ".....LNK" */
+    0x42,0x00,0x12,0x0D,0x04,0x0C,0xFF,0xFF,  /* 00000388    "B......." */
+    0x14,0x00,0x01,0x4C,0x4E,0x4B,0x43,0x00,  /* 00000390    "...LNKC." */
+    0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x14,0x00,  /* 00000398    "........" */
+    0x0A,0x02,0x4C,0x4E,0x4B,0x44,0x00,0x12,  /* 000003A0    "..LNKD.." */
+    0x0E,0x04,0x0C,0xFF,0xFF,0x14,0x00,0x0A,  /* 000003A8    "........" */
+    0x03,0x4C,0x4E,0x4B,0x41,0x00,0x12,0x0D,  /* 000003B0    ".LNKA..." */
+    0x04,0x0C,0xFF,0xFF,0x01,0x00,0x00,0x4C,  /* 000003B8    ".......L" */
+    0x4E,0x4B,0x41,0x00,0x12,0x0D,0x04,0x0C,  /* 000003C0    "NKA....." */
+    0xFF,0xFF,0x01,0x00,0x01,0x4C,0x4E,0x4B,  /* 000003C8    ".....LNK" */
+    0x42,0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,  /* 000003D0    "B......." */
+    0x01,0x00,0x0A,0x02,0x4C,0x4E,0x4B,0x43,  /* 000003D8    "....LNKC" */
+    0x00,0x12,0x0E,0x04,0x0C,0xFF,0xFF,0x01,  /* 000003E0    "........" */
+    0x00,0x0A,0x03,0x4C,0x4E,0x4B,0x44,0x00,  /* 000003E8    "...LNKD." */
+
+};
diff --git a/src/mainboard/via/epia-m/fadt.c b/src/mainboard/via/epia-m/fadt.c
index 3d9873e7b6..702d556988 100644
--- a/src/mainboard/via/epia-m/fadt.c
+++ b/src/mainboard/via/epia-m/fadt.c
@@ -15,8 +15,8 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
  */
 
 
diff --git a/src/mainboard/via/epia-m/failover.c b/src/mainboard/via/epia-m/failover.c
index bdcb9eaed2..35317fc7b2 100644
--- a/src/mainboard/via/epia-m/failover.c
+++ b/src/mainboard/via/epia-m/failover.c
@@ -8,6 +8,7 @@
 
 static unsigned long main(unsigned long bist)
 {
+#if 0
 	/* This is the primary cpu how should I boot? */
 	if (do_normal_boot()) {
 		goto normal_image;
@@ -28,5 +29,6 @@ static unsigned long main(unsigned long bist)
 		: /* clobbers */
 		);
  fallback_image:
+#endif
 	return bist;
 }
diff --git a/src/mainboard/via/epia-m/mainboard.c b/src/mainboard/via/epia-m/mainboard.c
index 9eb7b3705b..26e5916f01 100644
--- a/src/mainboard/via/epia-m/mainboard.c
+++ b/src/mainboard/via/epia-m/mainboard.c
@@ -25,7 +25,7 @@ static void vga_fixup(void) {
 
 }
  
-static void write_protect_vgabios(void)
+void write_protect_vgabios(void)
 {
  	device_t dev;
  
diff --git a/src/mainboard/via/epia-m/vgabios.c b/src/mainboard/via/epia-m/vgabios.c
new file mode 100644
index 0000000000..67620eaa2e
--- /dev/null
+++ b/src/mainboard/via/epia-m/vgabios.c
@@ -0,0 +1,861 @@
+#include <console/console.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#undef __KERNEL__
+#include <arch/io.h>
+//#include <printk.h>
+#include <string.h>
+#include "vgachip.h"
+
+/* vgabios.c. Derived from: */
+
+/*------------------------------------------------------------ -*- C -*-
+ *  2 Kernel Monte a.k.a. Linux loading Linux on x86
+ *
+ *  Erik Arjan Hendriks <hendriks@lanl.gov>
+ *
+ *  This version is a derivative of the original two kernel monte
+ *  which is (C) 2000 Scyld.
+ *
+ *  Copyright (C) 2000 Scyld Computing Corporation
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Portions related to the alpha architecture are:
+ *
+ *  Copyright(C) 2001 University of California.  LA-CC Number 01-67.
+ *  This software has been authored by an employee or employees of the
+ *  University of California, operator of the Los Alamos National
+ *  Laboratory under Contract No.  W-7405-ENG-36 with the U.S.
+ *  Department of Energy.  The U.S. Government has rights to use,
+ *  reproduce, and distribute this software. If the software is
+ *  modified to produce derivative works, such modified software should
+ *  be clearly marked, so as not to confuse it with the version
+ *  available from LANL.
+ *
+ *  This software may be used and distributed according to the terms
+ *  of the GNU General Public License, incorporated herein by
+ *  reference to http://www.gnu.org/licenses/gpl.html.
+ *
+ *  This software is provided by the author(s) "as is" and any express
+ *  or implied warranties, including, but not limited to, the implied
+ *  warranties of merchantability and fitness for a particular purpose
+ *  are disclaimed.  In no event shall the author(s) be liable for any
+ *  direct, indirect, incidental, special, exemplary, or consequential
+ *  damages (including, but not limited to, procurement of substitute
+ *  goods or services; loss of use, data, or profits; or business
+ *  interruption) however caused and on any theory of liability,
+ *  whether in contract, strict liability, or tort (including
+ *  negligence or otherwise) arising in any way out of the use of this
+ *  software, even if advised of the possibility of such damage.
+ *
+ *  $Id: vgabios.c,v 1.5 2004/10/06 17:33:52 rminnich Exp $
+ *--------------------------------------------------------------------*/
+
+/* Modified to be a self sufficient plug in so that it can be used 
+   without reliance on other parts of core Linuxbios 
+   (C) 2005 Nick.Barker9@btinternet.com
+
+  Used initially for epia-m where there are problems getting the bios
+  emulator to successfully run this bios.
+*/
+
+/* Declare a temporary global descriptor table - necessary because the
+   Core part of the bios no longer sets up any 16 bit segments */
+__asm__ (
+	/* pointer to original gdt */
+	"gdtarg:			\n\t"
+	".word	gdt_limit	\n\t"
+	".long	gdt			\n\t"		
+
+	/* compute the table limit */
+	"__mygdt_limit = __mygdt_end - __mygdt - 1	\n\t"
+
+	"__mygdtaddr:			\n\t"
+	".word	__mygdt_limit	\n\t"
+	".long	__mygdt			\n\t"		
+
+
+	"__mygdt: 				\n\t"
+	/* selgdt 0, unused */
+	".word	0x0000, 0x0000	\n\t"
+	".byte	0x00, 0x00, 0x00, 0x00	\n\t"
+
+	/* selgdt 8, unused */
+	".word	0x0000, 0x0000			\n\t"
+	".byte	0x00, 0x00, 0x00, 0x00	\n\t"
+
+	/* selgdt 0x10, flat code segment */
+	".word	0xffff, 0x0000			\n\t"		
+	".byte	0x00, 0x9b, 0xcf, 0x00	\n\t"	
+
+	/* selgdt 0x18, flat data segment */
+	".word	0xffff, 0x0000			\n\t"		
+	".byte	0x00, 0x93, 0xcf, 0x00	\n\t"
+
+	/* selgdt 0x20, unused */
+	".word	0x0000, 0x0000			\n\t"
+	".byte	0x00, 0x00, 0x00, 0x00	\n\t"
+
+        /*selgdt 0x28 16-bit 64k code at 0x00000000 */
+	".word 0xffff, 0x0000			\n\t"
+	".byte 0, 0x9a, 0, 0			\n\t"
+
+	/* selgdt 0x30 16-bit 64k data at 0x00000000 */
+	".word 0xffff, 0x0000			\n\t"
+	".byte 0, 0x92, 0, 0			\n\t"
+
+	"__mygdt_end:					\n\t"
+);
+
+/* Declare a pointer to where our idt is going to be i.e. at mem zero */
+__asm__ (
+	"__myidt:	\n"
+	"    .word 1023	\n"
+	"    .long 0 \n"
+	"    .word 0 \n"
+);
+
+/* The address arguments to this function are PHYSICAL ADDRESSES */ 
+static void real_mode_switch_call_vga(unsigned long devfn)
+{
+	__asm__ __volatile__ (
+		// paranoia -- does ecx get saved? not sure. This is 
+		// the easiest safe thing to do.
+		"	pushal\n"
+		/* save the stack */
+		"	mov %esp, __stack\n"
+		"	jmp 1f\n"
+		"__stack: .long 0\n"
+		"1:\n"
+		/* get devfn into %ecx */
+		"	movl    %esp, %ebp\n"
+		"	movl    8(%ebp), %ecx\n"
+		/* load 'our' gdt */
+		"   lgdt %cs:__mygdtaddr		\n\t"
+
+		/*  This configures CS properly for real mode. */
+		"	ljmp $0x28, $__rms_16bit\n"
+		"__rms_16bit:                 \n"
+		".code16                      \n"
+		/* 16 bit code from here on... */
+
+		/* Load the segment registers w/ properly configured segment
+		 * descriptors.  They will retain these configurations (limits,
+		 * writability, etc.) once protected mode is turned off. */
+		"	mov  $0x30, %ax         \n"
+		"	mov  %ax, %ds          \n"
+		"	mov  %ax, %es          \n"
+		"	mov  %ax, %fs          \n"
+		"	mov  %ax, %gs          \n"
+		"	mov  %ax, %ss          \n"
+
+		/* Turn off protection (bit 0 in CR0) */
+		"	movl %cr0, %eax        \n"
+		"	andl $0xFFFFFFFE, %eax  \n"
+		"	movl %eax, %cr0        \n"
+
+		/* Now really going into real mode */
+		"	ljmp $0,  $__rms_real \n"
+		"__rms_real:                  \n"
+
+		// put the stack at the end of page zero. 
+		// that way we can easily share it between real and protected, 
+		// since the 16-bit ESP at segment 0 will work for any case. 
+		/* Setup a stack */
+		"    mov  $0x0, %ax       \n"
+		"    mov  %ax, %ss          \n"
+		"    movl  $0x1000, %eax       \n"
+		"    movl  %eax, %esp          \n"
+
+		/* Load our 16 it idt */
+		"    xor  %ax, %ax          \n"
+		"    mov  %ax, %ds          \n"
+		"    lidt __myidt            \n"
+
+
+		/* Dump zeros in the other segregs */
+		"    mov  %ax, %es          \n"
+		"    mov  %ax, %fs          \n"
+		"    mov  %ax, %gs          \n"
+		"    mov  $0x40, %ax          \n"
+		"    mov  %ax, %ds          \n"
+		"    mov %cx, %ax	\n"
+		/* go run the code */
+		" .byte 0x9a, 0x03, 0, 0, 0xc0  \n"
+
+		/* if we got here, just about done. 
+		 * Need to get back to protected mode */
+		"movl	%cr0, %eax\n"
+		"orl	$0x0000001, %eax\n" /* PE = 1 */
+		"movl	%eax, %cr0\n"
+
+		/* Now that we are in protected mode jump to a 32 bit code segment. */
+		"data32	ljmp	$0x10, $vgarestart\n"
+		"vgarestart:\n"
+		".code32\n"
+		"    movw $0x18, %ax          \n"
+		"    mov  %ax, %ds          \n"
+		"    mov  %ax, %es          \n"
+		"    mov  %ax, %fs          \n"
+		"    mov  %ax, %gs          \n"
+		"    mov  %ax, %ss          \n"
+
+		/* restore proper gdt and idt */
+		"	 lgdt %cs:gdtarg			\n"
+		"    lidt idtarg            \n"
+		".globl vga_exit\n"
+		"vga_exit:\n"
+		"    mov  __stack, %esp\n"
+		"    popal\n"
+		);
+}
+
+__asm__ (".text\n""real_mode_switch_end:\n");
+extern char real_mode_switch_end[];
+
+/* call vga bios int 10 function 0x4f14 to enable main console 
+   epia-m does not always autosence the main console so forcing it on is good !! */
+ 
+void vga_enable_console()
+{
+	__asm__ __volatile__ (
+		// paranoia -- does ecx get saved? not sure. This is 
+		// the easiest safe thing to do.
+		"	pushal\n"
+		/* save the stack */
+		"	mov %esp, __stack\n"
+
+		/* load 'our' gdt */
+		"   lgdt %cs:__mygdtaddr		\n\t"
+
+		/*  This configures CS properly for real mode. */
+		"	ljmp $0x28, $__vga_ec_16bit\n"
+		"__vga_ec_16bit:                 \n"
+		".code16                      \n"
+		/* 16 bit code from here on... */
+
+		/* Load the segment registers w/ properly configured segment
+		 * descriptors.  They will retain these configurations (limits,
+		 * writability, etc.) once protected mode is turned off. */
+		"	mov  $0x30, %ax         \n"
+		"	mov  %ax, %ds          \n"
+		"	mov  %ax, %es          \n"
+		"	mov  %ax, %fs          \n"
+		"	mov  %ax, %gs          \n"
+		"	mov  %ax, %ss          \n"
+
+		/* Turn off protection (bit 0 in CR0) */
+		"	movl %cr0, %eax        \n"
+		"	andl $0xFFFFFFFE, %eax  \n"
+		"	movl %eax, %cr0        \n"
+
+		/* Now really going into real mode */
+		"	ljmp $0,  $__vga_ec_real \n"
+		"__vga_ec_real:                  \n"
+
+		// put the stack at the end of page zero. 
+		// that way we can easily share it between real and protected, 
+		// since the 16-bit ESP at segment 0 will work for any case. 
+		/* Setup a stack */
+		"    mov  $0x0, %ax       \n"
+		"    mov  %ax, %ss          \n"
+		"    movl  $0x1000, %eax       \n"
+		"    movl  %eax, %esp          \n"
+		/* debugging for RGM */
+		"    mov $0x11, %al	\n"
+		" outb	%al, $0x80\n"
+
+		/* Load our 16 it idt */
+		"    xor  %ax, %ax          \n"
+		"    mov  %ax, %ds          \n"
+		"    lidt __myidt            \n"
+
+		/* Dump zeros in the other segregs */
+		"    mov  %ax, %ds          \n"
+		"    mov  %ax, %es          \n"
+		"    mov  %ax, %fs          \n"
+		"    mov  %ax, %gs          \n"
+
+		/* ask bios to enable main console */
+		/* set up for int 10 call - values found from X server bios call routines */
+		"    movw $0x4f14,%ax    \n"
+		"    movw $0x8003,%bx     \n"
+		"    movw $1, %cx          \n"
+		"    movw $0, %dx          \n"
+		"    movw $0, %di          \n"
+		"  .byte 0xcd, 0x10             \n"
+		" movb $0x55, %al\noutb %al, $0x80\n"
+
+		/* if we got here, just about done. 
+		 * Need to get back to protected mode */
+		"movl	%cr0, %eax\n"
+		"orl	$0x0000001, %eax\n" /* PE = 1 */
+		"movl	%eax, %cr0\n"
+
+		/* Now that we are in protected mode jump to a 32 bit code segment. */
+		"data32	ljmp	$0x10, $vga_ec_restart\n"
+		"vga_ec_restart:\n"
+		".code32\n"
+		"    movw $0x18, %ax          \n"
+		"    mov  %ax, %ds          \n"
+		"    mov  %ax, %es          \n"
+		"    mov  %ax, %fs          \n"
+		"    mov  %ax, %gs          \n"
+		"    mov  %ax, %ss          \n"
+
+
+		/* restore proper gdt and idt */
+		"	 lgdt %cs:gdtarg			\n"
+		"    lidt idtarg            \n"
+		".globl vga__ec_exit\n"
+		"vga_ec_exit:\n"
+		"    mov  __stack, %esp\n"
+		"    popal\n"
+		);
+}
+
+
+void
+do_vgabios(void)
+{
+	device_t dev;
+	unsigned long busdevfn;
+	unsigned int rom = 0;
+	unsigned char *buf;
+	unsigned int size = 64*1024;
+	int i;
+	
+	/* clear vga bios data area */
+	for (i=0x400; i<0x500; i++) {
+		*(unsigned char *) i = 0;
+	}
+
+	dev = dev_find_class(PCI_CLASS_DISPLAY_VGA<<8 , 0);
+
+	if (! dev) {
+		printk_debug("NO VGA FOUND\n");
+		return;
+	}
+	printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device);
+	
+	/* declare rom address here - keep any config data out of the way of core LXB stuff */
+
+	rom = 0xfffc0000;
+	pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1);
+	printk_debug("rom base, size: %x\n", rom);
+
+	buf = (unsigned char *) rom;
+	if ((buf[0] == 0x55) && (buf[1] == 0xaa)) {
+		memcpy((void *) 0xc0000, buf, size);
+
+		write_protect_vgabios();  // in northbridge
+
+	  	// check signature again
+		buf = (unsigned char *) 0xc0000;
+		if (buf[0]==0x55 && buf[1]==0xAA) {
+			busdevfn = (dev->bus->secondary << 8) | dev->path.u.pci.devfn;
+			printk_debug("bus/devfn = %#x\n", busdevfn);
+
+		    	real_mode_switch_call_vga(busdevfn);
+		} else
+			printk_debug("Failed to copy VGA BIOS to 0xc0000\n");
+		
+	} else 
+		printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]);
+	
+	pci_write_config32(dev, PCI_ROM_ADDRESS, 0);
+
+}
+
+
+// we had hoped to avoid this. 
+// this is a stub IDT only. It's main purpose is to ignore calls 
+// to the BIOS. 
+// no longer. Dammit. We have to respond to these.
+struct realidt {
+	unsigned short offset, cs;
+}; 
+
+// from a handy writeup that andrey found.
+
+// handler. 
+// There are some assumptions we can make here. 
+// First, the Top Of Stack (TOS) is located on the top of page zero. 
+// we can share this stack between real and protected mode. 
+// that simplifies a lot of things ...
+// we'll just push all the registers on the stack as longwords, 
+// and pop to protected mode. 
+// second, since this only ever runs as part of linuxbios, 
+// we know all the segment register values -- so we don't save any.
+// keep the handler that calls things small. It can do a call to 
+// more complex code in linuxbios itself. This helps a lot as we don't
+// have to do address fixup in this little stub, and calls are absolute
+// so the handler is relocatable.
+void handler(void) {
+	__asm__ __volatile__ ( 
+		".code16\n"
+		"idthandle:\n"
+		"	pushal\n"
+		"	movb $0, %al\n"
+		"	ljmp $0, $callbiosint16\n"
+		"end_idthandle:\n"
+		".code32\n"
+		);
+
+}
+
+void debughandler(void) {
+	__asm__ __volatile__ ( 
+		".code16\n"
+		"debughandle:\n"
+		"   pushw %cx  \n"
+		"   movw  $250, %cx \n"
+		"dbh1:         \n"
+		"	loop dbh1  \n"
+		"   popw %cx   \n"
+		"	iret \n"
+		"end_debughandle:\n"
+		".code32\n"
+		);
+
+}
+
+// Calling conventions. The first C function is called with this stuff
+// on the stack. They look like value parameters, but note that if you
+// modify them they will go back to the INTx function modified. 
+// the C function will call the biosint function with these as
+// REFERENCE parameters. In this way, we can easily get 
+// returns back to the INTx caller (i.e. vgabios)
+void callbiosint(void) {
+	__asm__ __volatile__ (
+		".code16\n"
+		"callbiosint16:\n"
+		" push %ds \n"
+		" push %es \n"
+		" push %fs \n"
+		" push %gs \n"
+		// clean up the int #. To save space we put it in the lower
+		// byte. But the top 24 bits are junk. 
+		"andl $0xff, %eax\n"
+		// this push does two things:
+		// - put the INT # on the stack as a parameter
+		// - provides us with a temp for the %cr0 mods.
+		"pushl	%eax\n"
+		"movl    %cr0, %eax\n"
+		//"andl    $0x7FFAFFD1, %eax\n" /* PG,AM,WP,NE,TS,EM,MP = 0 */
+		//"orl    $0x60000001, %eax\n" /* CD, NW, PE = 1 */
+		"orl    $0x00000001, %eax\n" /* PE = 1 */
+		"movl    %eax, %cr0\n"
+		/* Now that we are in protected mode jump to a 32 bit code segment. */
+		"data32  ljmp    $0x10, $biosprotect\n"
+		"biosprotect:\n"
+		".code32\n"
+		"    movw $0x18, %ax          \n"
+		"    mov  %ax, %ds          \n"
+		"    mov  %ax, %es          \n"
+		"    mov  %ax, %fs          \n"
+		"    mov  %ax, %gs          \n"
+		"    mov  %ax, %ss          \n"
+		"   lidt idtarg         \n"
+		"	call	biosint	\n"
+		// back to real mode ...
+		"    ljmp $0x28, $__rms_16bit2\n"
+		"__rms_16bit2:                 \n"
+		".code16                      \n" /* 16 bit code from here on... */
+		
+		/* Load the segment registers w/ properly configured segment
+		 * descriptors.  They will retain these configurations (limits,
+		 * writability, etc.) once protected mode is turned off. */
+		"    mov  $0x30, %ax         \n"
+		"    mov  %ax, %ds          \n"
+		"    mov  %ax, %es          \n"
+		"    mov  %ax, %fs          \n"
+		"    mov  %ax, %gs          \n"
+		"    mov  %ax, %ss          \n"
+		
+		/* Turn off protection (bit 0 in CR0) */
+		"    movl %cr0, %eax        \n"
+		"    andl $0xFFFFFFFE, %eax  \n"
+		"    movl %eax, %cr0        \n"
+		
+		/* Now really going into real mode */
+		"    ljmp $0,  $__rms_real2 \n"
+		"__rms_real2:                  \n"
+		
+		/* Setup a stack */
+		"    mov  $0x0, %ax       \n"
+		"    mov  %ax, %ss          \n"
+		/* ebugging for RGM */
+		"    mov $0x11, %al      \n"
+		" outb  %al, $0x80\n"
+		"    xor  %ax, %ax          \n"
+		"    mov  %ax, %ds          \n"
+		"    lidt __myidt           \n"
+		"    mov  %ax, %es          \n"
+		"    mov  %ax, %fs          \n"
+		"    mov  %ax, %gs          \n"
+		"    mov  $0x40, %ax        \n"
+		"    mov  %ax, %ds          \n"
+		// pop the INT # that you pushed earlier
+		"   popl	%eax\n"
+		"   pop %gs \n"
+		"   pop %fs \n"
+		"   pop %es \n"
+		"   pop %ds \n"
+		"   popal\n"
+		"   iret\n"
+		".code32\n"
+		);
+}
+
+
+enum {
+	PCIBIOS = 0x1a, 
+	MEMSIZE = 0x12
+};
+int
+pcibios(
+        unsigned long *pedi,
+        unsigned long *pesi,
+        unsigned long *pebp,
+        unsigned long *pesp,
+        unsigned long *pebx,
+        unsigned long *pedx,
+        unsigned long *pecx,
+        unsigned long *peax,
+        unsigned long *pflags
+        );
+int
+handleint21(
+        unsigned long *pedi,
+        unsigned long *pesi,
+        unsigned long *pebp,
+        unsigned long *pesp,
+        unsigned long *pebx,
+        unsigned long *pedx,
+        unsigned long *pecx,
+        unsigned long *peax,
+        unsigned long *pflags
+        );
+
+extern void vga_exit(void);
+
+int
+biosint(
+	unsigned long intnumber,
+	unsigned long gsfs,
+	unsigned long dses,
+	unsigned long edi, 
+	unsigned long esi,
+	unsigned long ebp, 
+	unsigned long esp, 
+	unsigned long ebx, 
+	unsigned long edx, 
+	unsigned long ecx, 
+	unsigned long eax, 
+	unsigned long cs_ip,
+	unsigned short stackflags
+	) {
+	unsigned long ip; 
+	unsigned long cs; 
+	unsigned long flags;
+	int ret = -1;
+	
+	ip = cs_ip & 0xffff;
+	cs = cs_ip >> 16;
+	flags = stackflags;
+	
+	printk_debug("biosint: # 0x%lx, eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", 
+		     intnumber, eax, ebx, ecx, edx);
+	printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", ebp, esp, edi, esi);
+	printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n", ip, cs, flags);
+	// cases in a good compiler are just as good as your own tables. 
+	switch (intnumber) {
+	case 0 ... 15:
+		// These are not BIOS service, but the CPU-generated exceptions
+		printk_info("biosint: Oops, exception %u\n", intnumber);
+		if (esp < 0x1000) {
+			printk_debug("Stack contents: ");
+			while (esp < 0x1000) {
+				printk_debug("0x%04x ", *(unsigned short *) esp);
+				esp += 2;
+			}
+			printk_debug("\n");
+		}
+		printk_debug("biosint: Bailing out\n");
+		// "longjmp"
+		vga_exit();
+		break;
+		
+	case PCIBIOS:
+		ret = pcibios( &edi, &esi, &ebp, &esp, 
+			       &ebx, &edx, &ecx, &eax, &flags);
+		break;
+	case MEMSIZE: 
+		// who cares. 
+		eax = 64 * 1024;
+		ret = 0;
+		break;
+	case 0x15:
+		ret=handleint21( &edi, &esi, &ebp, &esp, 
+				&ebx, &edx, &ecx, &eax, &flags);
+		break;
+	default:
+		printk_info("BIOSINT: Unsupport int #0x%x\n", 
+			    intnumber);
+		break;
+	}
+	if (ret)
+		flags |= 1; // carry flags
+	else
+		flags &= ~1;
+	stackflags = flags;
+	return ret;
+} 
+
+
+void setup_realmode_idt(void) 
+{
+	extern unsigned char idthandle, end_idthandle;
+	extern unsigned char debughandle, end_debughandle;
+
+	int i;
+	struct realidt *idts = (struct realidt *) 0;
+	int codesize = &end_idthandle - &idthandle;
+	unsigned char *intbyte, *codeptr;
+	
+	// for each int, we create a customized little handler
+	// that just pushes %ax, puts the int # in %al, 
+	// then calls the common interrupt handler. 
+	// this necessitated because intel didn't know much about 
+	// architecture when they did the 8086 (it shows)
+	// (hmm do they know anymore even now :-)
+	// obviously you can see I don't really care about memory 
+	// efficiency. If I did I would probe back through the stack
+	// and get it that way. But that's really disgusting.
+	for (i = 0; i < 256; i++) {
+		idts[i].cs = 0;
+		codeptr = (char*) 4096 + i * codesize;
+		idts[i].offset = (unsigned) codeptr;
+		memcpy(codeptr, &idthandle, codesize);
+		intbyte = codeptr + 3;
+		*intbyte = i;
+	}
+	
+	// fixed entry points
+	
+	// VGA BIOSes tend to hardcode f000:f065 as the previous handler of
+	// int10. 
+	// calling convention here is the same as INTs, we can reuse
+	// the int entry code.
+	codeptr = (char*) 0xff065;
+	memcpy(codeptr, &idthandle, codesize);
+	intbyte = codeptr + 3;
+	*intbyte = 0x42; /* int42 is the relocated int10 */
+
+	/* debug handler - useful to set a programmable delay between instructions if the TF bit is set upon
+           call to real mode */
+	idts[1].cs = 0;
+	idts[1].offset = 16384;
+	memcpy(16384, &debughandle, &end_debughandle - &debughandle);
+
+	
+}
+
+
+
+enum {
+	CHECK = 0xb001,
+	FINDDEV = 0xb102,
+	READCONFBYTE = 0xb108,
+	READCONFWORD = 0xb109,
+	READCONFDWORD = 0xb10a,
+	WRITECONFBYTE = 0xb10b,
+	WRITECONFWORD = 0xb10c,
+	WRITECONFDWORD = 0xb10d
+};
+
+// errors go in AH. Just set these up so that word assigns
+// will work. KISS. 
+enum {
+	PCIBIOS_NODEV = 0x8600,
+	PCIBIOS_BADREG = 0x8700
+};
+
+int
+pcibios(
+	unsigned long *pedi, 
+	unsigned long *pesi,
+	unsigned long *pebp, 
+	unsigned long *pesp, 
+	unsigned long *pebx, 
+	unsigned long *pedx, 
+	unsigned long *pecx, 
+	unsigned long *peax, 
+	unsigned long *pflags
+	) {
+	unsigned long edi = *pedi;
+	unsigned long esi = *pesi;
+	unsigned long ebp = *pebp;
+	unsigned long esp = *pesp;
+	unsigned long ebx = *pebx;
+	unsigned long edx = *pedx;
+	unsigned long ecx = *pecx;
+	unsigned long eax = *peax;
+	unsigned long flags = *pflags;
+	unsigned short func = (unsigned short) eax;
+	int retval = 0;
+	unsigned short devid, vendorid, devfn;
+	short devindex; /* Use short to get rid of gabage in upper half of 32-bit register */
+	unsigned char bus;
+	device_t dev;
+	
+	switch(func) {
+	case  CHECK:
+		*pedx = 0x4350;
+		*pecx = 0x2049;
+		retval = 0;
+		break;
+	case FINDDEV:
+	{
+		devid = *pecx;
+		vendorid = *pedx;
+		devindex = *pesi;
+		dev = 0;
+		while ((dev = dev_find_device(vendorid, devid, dev))) {
+			if (devindex <= 0)
+				break;
+			devindex--;
+		}
+		if (dev) {
+			unsigned short busdevfn;
+			*peax = 0;
+			// busnum is an unsigned char;
+			// devfn is an int, so we mask it off. 
+			busdevfn = (dev->bus->secondary << 8)
+				| (dev->path.u.pci.devfn & 0xff);
+			printk_debug("0x%x: return 0x%x\n", func, busdevfn);
+			*pebx = busdevfn;
+			retval = 0;
+		} else {
+			*peax = PCIBIOS_NODEV;
+			retval = -1;
+		}
+	}
+	break;
+	case READCONFDWORD:
+	case READCONFWORD:
+	case READCONFBYTE:
+	case WRITECONFDWORD:
+	case WRITECONFWORD:
+	case WRITECONFBYTE:
+	{
+		unsigned long dword;
+		unsigned short word;
+		unsigned char byte;
+		unsigned char reg;
+		
+		devfn = *pebx & 0xff;
+		bus = *pebx >> 8;
+		reg = *pedi;
+		dev = dev_find_slot(bus, devfn);
+		if (! dev) {
+			printk_debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
+			// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
+			*peax = PCIBIOS_BADREG;
+			retval = -1;
+		}
+		switch(func) {
+		case READCONFBYTE:
+			byte = pci_read_config8(dev, reg);
+			*pecx = byte;
+			break;
+		case READCONFWORD:
+			word = pci_read_config16(dev, reg);
+			*pecx = word;
+			break;
+		case READCONFDWORD:
+			dword = pci_read_config32(dev, reg);
+			*pecx = dword;
+			break;
+		case WRITECONFBYTE:
+			byte = *pecx;
+			pci_write_config8(dev, reg, byte);
+			break;
+		case WRITECONFWORD:
+			word = *pecx;
+			pci_write_config16(dev, reg, word);
+			break;
+		case WRITECONFDWORD:
+			dword = *pecx;
+			pci_write_config32(dev, reg, dword);
+			break;
+		}
+		
+		if (retval) 
+			retval = PCIBIOS_BADREG;
+		printk_debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", func, bus, devfn, reg, *pecx);
+		*peax = 0;
+		retval = 0;
+	}
+	break;
+	default:
+		printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n",  func);
+		break;
+	}
+	
+	return retval;
+} 
+
+
+
+int handleint21( unsigned long *edi, unsigned long *esi, unsigned long *ebp,
+			  unsigned long *esp, unsigned long *ebx, unsigned long *edx,
+			  unsigned long *ecx, unsigned long *eax, unsigned long *flags)
+{
+int res=-1;
+	switch(*eax&0xffff)
+	{
+	case 0x5f19:
+		break;
+	case 0x5f18:
+		*eax=0x5f;
+		*ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
+		*ecx=0x060;
+		res=0;
+		break;
+	case 0x5f00:
+		*eax = 0x8600;
+		break;
+	case 0x5f01:
+		*eax = 0x5f;
+		*ecx = (*ecx & 0xffffff00 ) | 2; // panel type =  2 = 1024 * 768
+		res = 0;
+		break;
+	case 0x5f02:
+		*eax=0x5f;
+		*ebx= (*ebx & 0xffff0000) | 2;
+		*ecx= (*ecx & 0xffff0000) | 0x401;  // PAL + crt only 
+		*edx= (*edx & 0xffff0000) | 0;  // TV Layout - default
+		res=0;
+		break;
+	case 0x5f0f:
+		*eax=0x860f;
+		break;
+	}
+	return res;
+}
diff --git a/src/mainboard/via/epia-m/vgachip.h b/src/mainboard/via/epia-m/vgachip.h
new file mode 100644
index 0000000000..d43788cd66
--- /dev/null
+++ b/src/mainboard/via/epia-m/vgachip.h
@@ -0,0 +1,10 @@
+#ifndef _PC80_VGABIOS
+#define _PC80_VGABIOS
+
+extern struct chip_control pc80_vgabios_control;
+
+struct pc80_vgabios_config {
+	int nothing;
+};
+
+#endif /* _PC80_VGABIOS */