diff options
author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2017-11-20 02:09:19 +0100 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-11-23 05:01:47 +0000 |
commit | 482d16fb0ab1899da856b083f35b682917b0ed96 (patch) | |
tree | de94970c02dad441bd09feb1d5d21048c81e59ab /src/mainboard | |
parent | bfd62fabc9b7b52a2ec5de93749ab01f697a01a7 (diff) | |
download | coreboot-482d16fb0ab1899da856b083f35b682917b0ed96.tar.xz |
src/mainboard: Fix various typos
These typos were found through manual review and grep.
Change-Id: Ia5a9acae4fbe2627017743106d9326a14c99a225
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/22525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
32 files changed, 33 insertions, 33 deletions
diff --git a/src/mainboard/amd/lamar/mainboard.c b/src/mainboard/amd/lamar/mainboard.c index 7c109b2872..050dd14bd3 100644 --- a/src/mainboard/amd/lamar/mainboard.c +++ b/src/mainboard/amd/lamar/mainboard.c @@ -62,7 +62,7 @@ const u8 mainboard_picr_data[] = { [0x68] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, [0x70] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, [0x78] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, - /* [80..81] Northbridge devices (indicies above C00/C01 range) */ + /* [80..81] Northbridge devices (indices above C00/C01 range) */ [0x80] = 0x0C,0x1F, }; @@ -90,7 +90,7 @@ const u8 mainboard_intr_data[] = { [0x68] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, [0x70] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, [0x78] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F, - /* [80..81] Northbridge devices (indicies above C00/C01 range) */ + /* [80..81] Northbridge devices (indices above C00/C01 range) */ [0x80] = 0x17,0x10, }; diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c index f34f878337..9b121d1c69 100644 --- a/src/mainboard/asus/kcma-d8/romstage.c +++ b/src/mainboard/asus/kcma-d8/romstage.c @@ -115,7 +115,7 @@ void activate_spd_rom(const struct mem_controller *ctrl) { } /* Voltages are specified by index - * Valid indicies for this platform are: + * Valid indices for this platform are: * 0: 1.5V * 1: 1.35V * 2: 1.25V diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index a388a54140..63b93c19c5 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -131,7 +131,7 @@ void activate_spd_rom(const struct mem_controller *ctrl) { } /* Voltages are specified by index - * Valid indicies for this platform are: + * Valid indices for this platform are: * 0: 1.5V * 1: 1.35V * 2: 1.25V diff --git a/src/mainboard/google/chell/gpio.h b/src/mainboard/google/chell/gpio.h index 76b2d09cc8..ebece32f12 100644 --- a/src/mainboard/google/chell/gpio.h +++ b/src/mainboard/google/chell/gpio.h @@ -182,7 +182,7 @@ static const struct pad_config gpio_table[] = { /* * The next 4 pads are for bit banging the amplifiers. They are connected * together with i2s0 signals. For default behavior of i2s make these - * gpio inupts. + * gpio inputs. */ /* I2S2_SCLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F0, NONE, DEEP), /* I2S2_SFRM */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F1, NONE, DEEP), diff --git a/src/mainboard/google/chell/romstage.c b/src/mainboard/google/chell/romstage.c index 5360da683c..54b4afa62b 100644 --- a/src/mainboard/google/chell/romstage.c +++ b/src/mainboard/google/chell/romstage.c @@ -32,7 +32,7 @@ void mainboard_romstage_entry(struct romstage_params *params) /* Fill out PEI DATA */ mainboard_fill_pei_data(params->pei_data); mainboard_fill_spd_data(params->pei_data); - /* Initliaze memory */ + /* Initialize memory */ romstage_common(params); } diff --git a/src/mainboard/google/gale/mainboard.c b/src/mainboard/google/gale/mainboard.c index f27421b87c..de384f9ea8 100644 --- a/src/mainboard/google/gale/mainboard.c +++ b/src/mainboard/google/gale/mainboard.c @@ -81,7 +81,7 @@ void lb_board(struct lb_header *header) dma->range_size = _dma_coherent_size; if (IS_ENABLED(CONFIG_CHROMEOS)) { - /* Retrieve the switch interface MAC addressses. */ + /* Retrieve the switch interface MAC addresses. */ lb_table_add_macs_from_vpd(header); } } diff --git a/src/mainboard/google/glados/gpio.h b/src/mainboard/google/glados/gpio.h index acd0eada1b..aa5ca0be23 100644 --- a/src/mainboard/google/glados/gpio.h +++ b/src/mainboard/google/glados/gpio.h @@ -185,7 +185,7 @@ static const struct pad_config gpio_table[] = { /* * The next 4 pads are for bit banging the amplifiers. They are connected * together with i2s0 signals. For default behavior of i2s make these - * gpio inupts. + * gpio inputs. */ /* I2S2_SCLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F0, NONE, DEEP), /* I2S2_SFRM */ PAD_CFG_GPI_GPIO_DRIVER(GPP_F1, NONE, DEEP), diff --git a/src/mainboard/google/glados/romstage.c b/src/mainboard/google/glados/romstage.c index 2612e2d4cc..72f15f99c3 100644 --- a/src/mainboard/google/glados/romstage.c +++ b/src/mainboard/google/glados/romstage.c @@ -27,7 +27,7 @@ void mainboard_romstage_entry(struct romstage_params *params) /* Fill out PEI DATA */ mainboard_fill_pei_data(params->pei_data); mainboard_fill_spd_data(params->pei_data); - /* Initliaze memory */ + /* Initialize memory */ romstage_common(params); } diff --git a/src/mainboard/google/lars/romstage.c b/src/mainboard/google/lars/romstage.c index 84c2b6f534..926be8749f 100644 --- a/src/mainboard/google/lars/romstage.c +++ b/src/mainboard/google/lars/romstage.c @@ -38,7 +38,7 @@ void mainboard_romstage_entry(struct romstage_params *params) /* Fill out PEI DATA */ mainboard_fill_pei_data(params->pei_data); mainboard_fill_spd_data(params->pei_data); - /* Initliaze memory */ + /* Initialize memory */ romstage_common(params); } diff --git a/src/mainboard/google/rambi/variants/banjo/Makefile.inc b/src/mainboard/google/rambi/variants/banjo/Makefile.inc index e9252636ed..0c31309750 100644 --- a/src/mainboard/google/rambi/variants/banjo/Makefile.inc +++ b/src/mainboard/google/rambi/variants/banjo/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 2GiB total - 1 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/candy/Makefile.inc b/src/mainboard/google/rambi/variants/candy/Makefile.inc index 0a53d84cca..219cab4049 100644 --- a/src/mainboard/google/rambi/variants/candy/Makefile.inc +++ b/src/mainboard/google/rambi/variants/candy/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b0000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b0001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/clapper/Makefile.inc b/src/mainboard/google/rambi/variants/clapper/Makefile.inc index 1a01c8ae86..a15bac54d0 100644 --- a/src/mainboard/google/rambi/variants/clapper/Makefile.inc +++ b/src/mainboard/google/rambi/variants/clapper/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/enguarde/Makefile.inc b/src/mainboard/google/rambi/variants/enguarde/Makefile.inc index 5e0042acd4..4b3037ccba 100644 --- a/src/mainboard/google/rambi/variants/enguarde/Makefile.inc +++ b/src/mainboard/google/rambi/variants/enguarde/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/glimmer/Makefile.inc b/src/mainboard/google/rambi/variants/glimmer/Makefile.inc index 341f6d3417..760a86e84a 100644 --- a/src/mainboard/google/rambi/variants/glimmer/Makefile.inc +++ b/src/mainboard/google/rambi/variants/glimmer/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b0000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b0001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/gnawty/Makefile.inc b/src/mainboard/google/rambi/variants/gnawty/Makefile.inc index 05fbc698d4..47be14247f 100644 --- a/src/mainboard/google/rambi/variants/gnawty/Makefile.inc +++ b/src/mainboard/google/rambi/variants/gnawty/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/heli/Makefile.inc b/src/mainboard/google/rambi/variants/heli/Makefile.inc index d76a1274ed..38dd56c9ad 100644 --- a/src/mainboard/google/rambi/variants/heli/Makefile.inc +++ b/src/mainboard/google/rambi/variants/heli/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # RAM_ID Vendor Vendor_PN Freq Size Total_size channel # 0b0011 Hynix H5TC4G63AFR-PBA 1600MHZ 4Gb 2GB single-channel diff --git a/src/mainboard/google/rambi/variants/kip/Makefile.inc b/src/mainboard/google/rambi/variants/kip/Makefile.inc index 06bd0e738a..8ca5f69f46 100644 --- a/src/mainboard/google/rambi/variants/kip/Makefile.inc +++ b/src/mainboard/google/rambi/variants/kip/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/ninja/Makefile.inc b/src/mainboard/google/rambi/variants/ninja/Makefile.inc index b2552d32b4..65e4e95c7b 100644 --- a/src/mainboard/google/rambi/variants/ninja/Makefile.inc +++ b/src/mainboard/google/rambi/variants/ninja/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/orco/Makefile.inc b/src/mainboard/google/rambi/variants/orco/Makefile.inc index 1f9706e192..78cdb986ea 100644 --- a/src/mainboard/google/rambi/variants/orco/Makefile.inc +++ b/src/mainboard/google/rambi/variants/orco/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/quawks/Makefile.inc b/src/mainboard/google/rambi/variants/quawks/Makefile.inc index 48956a1110..20ecf6e5dd 100644 --- a/src/mainboard/google/rambi/variants/quawks/Makefile.inc +++ b/src/mainboard/google/rambi/variants/quawks/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Elpida EDJ4216EFBG-GNL-F 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/rambi/Makefile.inc b/src/mainboard/google/rambi/variants/rambi/Makefile.inc index 85956b0243..253bced3cd 100644 --- a/src/mainboard/google/rambi/variants/rambi/Makefile.inc +++ b/src/mainboard/google/rambi/variants/rambi/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/squawks/Makefile.inc b/src/mainboard/google/rambi/variants/squawks/Makefile.inc index 48956a1110..20ecf6e5dd 100644 --- a/src/mainboard/google/rambi/variants/squawks/Makefile.inc +++ b/src/mainboard/google/rambi/variants/squawks/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Elpida EDJ4216EFBG-GNL-F 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/sumo/Makefile.inc b/src/mainboard/google/rambi/variants/sumo/Makefile.inc index b2552d32b4..65e4e95c7b 100644 --- a/src/mainboard/google/rambi/variants/sumo/Makefile.inc +++ b/src/mainboard/google/rambi/variants/sumo/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GiB Micron MT41K256M16HA-125:E 1600MHz # 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/swanky/Makefile.inc b/src/mainboard/google/rambi/variants/swanky/Makefile.inc index 1458ebb385..62bfb5db49 100644 --- a/src/mainboard/google/rambi/variants/swanky/Makefile.inc +++ b/src/mainboard/google/rambi/variants/swanky/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 2GiB total - 1 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz # 0b001 - 2GiB total - 1 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz diff --git a/src/mainboard/google/rambi/variants/winky/Makefile.inc b/src/mainboard/google/rambi/variants/winky/Makefile.inc index 962f30c97b..552e69ace9 100644 --- a/src/mainboard/google/rambi/variants/winky/Makefile.inc +++ b/src/mainboard/google/rambi/variants/winky/Makefile.inc @@ -15,7 +15,7 @@ SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. # 0b000 - 4GiB total - 2 x 2GB - micron HTTC4G63CFR-PBA_x16_4Gb # 0b001 - 4GiB total - 2 x Samsung_2Gib_K4B4G1646Q-HYK0 diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c index 3de383a689..90ffe136d3 100644 --- a/src/mainboard/google/reef/mainboard.c +++ b/src/mainboard/google/reef/mainboard.c @@ -72,7 +72,7 @@ uint8_t __attribute__((weak)) variant_board_sku(void) return board_sku_num; } -/* Set variabnt board sku to ec by sku id */ +/* Set variant board sku to ec by sku id */ void __attribute__((weak)) variant_board_ec_set_skuid(void) { } diff --git a/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h index 3e30ccb299..0f2c37653f 100644 --- a/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/variants.h @@ -38,7 +38,7 @@ const struct lpddr4_cfg *variant_lpddr4_config(void); size_t variant_memory_sku(void); /* Return board SKU. Limited to uint8_t, so it fits into 3 decimal digits */ uint8_t variant_board_sku(void); -/* Set variabnt board sku to ec by sku id */ +/* Set variant board sku to ec by sku id */ void variant_board_ec_set_skuid(void); /* Return ChromeOS gpio table and fill in number of entries. */ diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c index 3c1477d0b5..df01c4f63c 100644 --- a/src/mainboard/google/storm/mainboard.c +++ b/src/mainboard/google/storm/mainboard.c @@ -125,7 +125,7 @@ void lb_board(struct lb_header *header) dma->range_size = _dma_coherent_size; #if IS_ENABLED(CONFIG_CHROMEOS) - /* Retrieve the switch interface MAC addressses. */ + /* Retrieve the switch interface MAC addresses. */ lb_table_add_macs_from_vpd(header); #endif } diff --git a/src/mainboard/google/urara/mainboard.c b/src/mainboard/google/urara/mainboard.c index f68bb0b9f5..27fdd90af5 100644 --- a/src/mainboard/google/urara/mainboard.c +++ b/src/mainboard/google/urara/mainboard.c @@ -50,7 +50,7 @@ void lb_board(struct lb_header *header) dma->range_size = _dma_coherent_size; #if IS_ENABLED(CONFIG_CHROMEOS) - /* Retrieve the switch interface MAC addressses. */ + /* Retrieve the switch interface MAC addresses. */ lb_table_add_macs_from_vpd(header); #endif } diff --git a/src/mainboard/intel/harcuvar/spd/Makefile.inc b/src/mainboard/intel/harcuvar/spd/Makefile.inc index 8fa8c63d82..38d5046138 100644 --- a/src/mainboard/intel/harcuvar/spd/Makefile.inc +++ b/src/mainboard/intel/harcuvar/spd/Makefile.inc @@ -18,7 +18,7 @@ romstage-y += spd.c SPD_BIN = $(obj)/spd.bin -# Order matters for SPD sources. The following indicies +# Order matters for SPD sources. The following indices # define the SPD data to use. SPD_SOURCES = micron_4GiB_dimm_MTA9ASF51272PZ-2G1A2 diff --git a/src/mainboard/intel/kunimitsu/romstage.c b/src/mainboard/intel/kunimitsu/romstage.c index 29ffb61f5c..1c6f5a2cd3 100644 --- a/src/mainboard/intel/kunimitsu/romstage.c +++ b/src/mainboard/intel/kunimitsu/romstage.c @@ -29,7 +29,7 @@ void mainboard_romstage_entry(struct romstage_params *params) /* Fill out PEI DATA */ mainboard_fill_pei_data(params->pei_data); mainboard_fill_spd_data(params->pei_data); - /* Initliaze memory */ + /* Initialize memory */ romstage_common(params); } diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c index 5331ebadf7..fa24594ee0 100644 --- a/src/mainboard/intel/strago/gpio.c +++ b/src/mainboard/intel/strago/gpio.c @@ -76,7 +76,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = { Native_M1, /* 80 USB_OC0_B */ NATIVE_INT_PU20K(1, L1), /* 81 SDMMC3_CD_B */ /* 81 SDMMC3_CD_B */ - GPIO_NC, /* 82 spkr asummed gpio number */ + GPIO_NC, /* 82 spkr assumed gpio number */ Native_M1, /* 83 SUSPWRDNACK */ SPARE_PIN,/* 84 spare pin */ Native_M1, /* 85 SDMMC3_1P8_EN */ |