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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-05-17 14:13:49 -0600
committerMartin Roth <martinroth@google.com>2017-07-02 18:43:52 +0000
commit99f50c7465cd6d75a1e5c6c4452136106092cf3c (patch)
tree991cd7ab99d95c21b12f1efb11072967a06cf193 /src/mainboard
parent68243a51570dfe31bdd8b81624796ebd0b8b8608 (diff)
downloadcoreboot-99f50c7465cd6d75a1e5c6c4452136106092cf3c.tar.xz
amd/gardenia: Add PSP DRAM notify to romstage
Change-Id: I6ccbbee00aab947079c3471fcf83ae9a66c01d59 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/19754 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/gardenia/romstage.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/amd/gardenia/romstage.c b/src/mainboard/amd/gardenia/romstage.c
index 471d63248e..85e8e2f256 100644
--- a/src/mainboard/amd/gardenia/romstage.c
+++ b/src/mainboard/amd/gardenia/romstage.c
@@ -24,6 +24,7 @@
#include <northbridge/amd/pi/agesawrapper.h>
#include <northbridge/amd/pi/agesawrapper_call.h>
#include <soc/hudson.h>
+#include <amdblocks/psp.h>
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
@@ -65,9 +66,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
AGESAWRAPPER(amdinitpost);
post_code(0x41);
- cbmem_initialize_empty();
+ psp_notify_dram();
post_code(0x42);
+ cbmem_initialize_empty();
+
+ post_code(0x43);
AGESAWRAPPER(amdinitenv);
/* TODO: Disable cache is not ok. */
disable_cache_as_ram();