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authorPatrick Rudolph <siro@das-labor.org>2016-06-09 18:13:34 +0200
committerMartin Roth <martinroth@google.com>2016-06-12 12:48:44 +0200
commit266a1f794dc28053e97794cbeb3f1a588137698b (patch)
tree7cb11796fa351bd50d15af6be9508a15be223192 /src/mainboard
parente7f35cd2924de7c9b2e8a74a50d35928b9da76a4 (diff)
downloadcoreboot-266a1f794dc28053e97794cbeb3f1a588137698b.tar.xz
nb/intel/raminit (native): Read PCI mmio size from devicetree
Instead of hardcoding the PCI mmio size read it from devicetree. Set a default value of 2048 MiB and 1024MiB for laptops without discrete graphics. Tested on Sandybridge Lenovo T520. Change-Id: I791ebd6897c5ba4e2e18bd307d320568b1378a13 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/15140 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/apple/macbookair4_2/devicetree.cb3
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb2
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb2
-rw-r--r--src/mainboard/google/stout/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t400/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t420/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t420s/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t430s/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t520/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t530/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/x200/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/x201/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/x220/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/x230/devicetree.cb2
-rw-r--r--src/mainboard/packardbell/ms2290/devicetree.cb2
-rw-r--r--src/mainboard/roda/rk9/devicetree.cb2
-rw-r--r--src/mainboard/samsung/lumpy/devicetree.cb2
-rw-r--r--src/mainboard/samsung/stumpy/devicetree.cb2
18 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/apple/macbookair4_2/devicetree.cb b/src/mainboard/apple/macbookair4_2/devicetree.cb
index a43b9f2dc7..226ec04004 100644
--- a/src/mainboard/apple/macbookair4_2/devicetree.cb
+++ b/src/mainboard/apple/macbookair4_2/devicetree.cb
@@ -30,6 +30,9 @@ chip northbridge/intel/sandybridge
end
end
end
+
+ register "pci_mmio_size" = "2048"
+
device domain 0x0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
index f4a8664849..2cd3816d46 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
@@ -19,6 +19,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
subsystemid 0x1458 0x5000 inherit
device pci 00.0 on # host bridge
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
index 5ed7ec335c..618943c57b 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
@@ -18,6 +18,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
subsystemid 0x1458 0x5000 inherit
device pci 00.0 on # host bridge
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index 6c693ad33c..76f285669a 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -42,6 +42,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "1024"
+
device domain 0 on
subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 7923046e49..43a610ab5f 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -23,6 +23,8 @@ chip northbridge/intel/gm45
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x20e0
diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb
index 9f42cbb9b3..809e3eed22 100644
--- a/src/mainboard/lenovo/t420/devicetree.cb
+++ b/src/mainboard/lenovo/t420/devicetree.cb
@@ -36,6 +36,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x21ce
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb
index 2376d64bea..841e6753d1 100644
--- a/src/mainboard/lenovo/t420s/devicetree.cb
+++ b/src/mainboard/lenovo/t420s/devicetree.cb
@@ -35,6 +35,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x21d2
diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb
index 8c0f10f9ba..d1cea3cc06 100644
--- a/src/mainboard/lenovo/t430s/devicetree.cb
+++ b/src/mainboard/lenovo/t430s/devicetree.cb
@@ -35,6 +35,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x21fb
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb
index 379a95d3af..c0292ec3fd 100644
--- a/src/mainboard/lenovo/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/devicetree.cb
@@ -36,6 +36,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
device pci 00.0 on end # host bridge
device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M]
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index 7db65c73ba..43d8264e3d 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -36,6 +36,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
device pci 00.0 on end # host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index 92c41d73d9..9f5bb41577 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -28,6 +28,8 @@ chip northbridge/intel/gm45
end
end
+ register "pci_mmio_size" = "1024"
+
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x20e0
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 23745540f8..bd6490e889 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -80,6 +80,8 @@ chip northbridge/intel/nehalem
end
end
+ register "pci_mmio_size" = "1024"
+
device domain 0 on
device pci 00.0 on # Host bridge
subsystemid 0x17aa 0x2193
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 6f84acd00a..af70b2021e 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -36,6 +36,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "1024"
+
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x21db
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index 37d53d4492..f0c940d736 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -36,6 +36,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "1024"
+
device domain 0 on
device pci 00.0 on
subsystemid 0x17aa 0x21fa
diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb
index 12ce648fb9..bb4e854e59 100644
--- a/src/mainboard/packardbell/ms2290/devicetree.cb
+++ b/src/mainboard/packardbell/ms2290/devicetree.cb
@@ -42,6 +42,8 @@ chip northbridge/intel/nehalem
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
device pci 00.0 on # Host bridge
subsystemid 0x1025 0x0379
diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb
index 003c08eb86..690c2a5b59 100644
--- a/src/mainboard/roda/rk9/devicetree.cb
+++ b/src/mainboard/roda/rk9/devicetree.cb
@@ -19,6 +19,8 @@ chip northbridge/intel/gm45
end
end
+ register "pci_mmio_size" = "2048"
+
device domain 0 on
subsystemid 0x4352 0x8986
device pci 00.0 on end # host bridge
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index f73e603970..0dd32280cd 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -34,6 +34,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "1024"
+
device domain 0 on
ioapic_irq 4 INTA 0x10
ioapic_irq 4 INTB 0x11
diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb
index 901711bd5c..adc15e668e 100644
--- a/src/mainboard/samsung/stumpy/devicetree.cb
+++ b/src/mainboard/samsung/stumpy/devicetree.cb
@@ -32,6 +32,8 @@ chip northbridge/intel/sandybridge
end
end
+ register "pci_mmio_size" = "1024"
+
device domain 0 on
subsystemid 0x1ae0 0xc000 inherit
device pci 00.0 on end # host bridge