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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-06 15:42:23 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-27 10:37:50 +0000
commit46f04cbb49fbab5854d395edefea5b5f81df572e (patch)
tree21f53019188bff1ee980ae8b7ed68ecdf0bb97ed /src/mainboard
parentb81731d9dbe067097388212c138e2bed88ce75d4 (diff)
downloadcoreboot-46f04cbb49fbab5854d395edefea5b5f81df572e.tar.xz
binaryPI: Drop BINARYPI_LEGACY_WRAPPER support
Drop all the sources that were guarded with this. Change-Id: I6c6fd19875cb57f0caf42a1a94f59efed83bfe0d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/19275 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/bettong/BiosCallOuts.c1
-rw-r--r--src/mainboard/amd/bettong/Kconfig2
-rw-r--r--src/mainboard/amd/bettong/OemCustomize.c1
-rw-r--r--src/mainboard/amd/bettong/romstage.c2
-rw-r--r--src/mainboard/amd/db-ft3b-lc/Kconfig2
-rw-r--r--src/mainboard/amd/db-ft3b-lc/OemCustomize.c1
-rw-r--r--src/mainboard/amd/db-ft3b-lc/romstage.c2
-rw-r--r--src/mainboard/amd/lamar/Kconfig2
-rw-r--r--src/mainboard/amd/lamar/OemCustomize.c1
-rw-r--r--src/mainboard/amd/lamar/romstage.c2
-rw-r--r--src/mainboard/amd/olivehillplus/Kconfig2
-rw-r--r--src/mainboard/amd/olivehillplus/OemCustomize.c1
-rw-r--r--src/mainboard/amd/olivehillplus/romstage.c2
-rw-r--r--src/mainboard/bap/ode_e21XX/Kconfig2
-rw-r--r--src/mainboard/bap/ode_e21XX/OemCustomize.c1
-rw-r--r--src/mainboard/bap/ode_e21XX/romstage.c2
16 files changed, 5 insertions, 21 deletions
diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c
index e9836904d3..a6f424eff1 100644
--- a/src/mainboard/amd/bettong/BiosCallOuts.c
+++ b/src/mainboard/amd/bettong/BiosCallOuts.c
@@ -23,7 +23,6 @@
#include <stdlib.h>
#include <string.h>
#include <northbridge/amd/pi/dimmSpd.h>
-#include <northbridge/amd/pi/agesawrapper.h>
#include <boardid.h>
#include "imc.h"
diff --git a/src/mainboard/amd/bettong/Kconfig b/src/mainboard/amd/bettong/Kconfig
index bcfceb19b3..0747bc1df5 100644
--- a/src/mainboard/amd/bettong/Kconfig
+++ b/src/mainboard/amd/bettong/Kconfig
@@ -20,7 +20,7 @@ if BOARD_AMD_BETTONG
config BOARD_SPECIFIC_OPTIONS
def_bool y
- select BINARYPI_LEGACY_WRAPPER
+ #select BINARYPI_LEGACY_WRAPPER
select CPU_AMD_PI_00660F01
select NORTHBRIDGE_AMD_PI_00660F01
select SOUTHBRIDGE_AMD_PI_KERN
diff --git a/src/mainboard/amd/bettong/OemCustomize.c b/src/mainboard/amd/bettong/OemCustomize.c
index 4843b2ade3..0e7882fb2e 100644
--- a/src/mainboard/amd/bettong/OemCustomize.c
+++ b/src/mainboard/amd/bettong/OemCustomize.c
@@ -14,7 +14,6 @@
*/
#include <AGESA.h>
-#include <northbridge/amd/pi/agesawrapper.h>
#include <PlatformMemoryConfiguration.h>
#include <boardid.h>
diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index 5201fa3a94..32f52de707 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -21,8 +21,6 @@
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/pi/agesawrapper.h>
-#include <northbridge/amd/pi/agesawrapper_call.h>
#include <southbridge/amd/pi/hudson/hudson.h>
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
diff --git a/src/mainboard/amd/db-ft3b-lc/Kconfig b/src/mainboard/amd/db-ft3b-lc/Kconfig
index eaee3e7cd3..d7650327ff 100644
--- a/src/mainboard/amd/db-ft3b-lc/Kconfig
+++ b/src/mainboard/amd/db-ft3b-lc/Kconfig
@@ -21,7 +21,7 @@ if BOARD_AMD_DB_FT3B_LC
config BOARD_SPECIFIC_OPTIONS
def_bool y
- select BINARYPI_LEGACY_WRAPPER
+ #select BINARYPI_LEGACY_WRAPPER
select CPU_AMD_PI_00730F01
select NORTHBRIDGE_AMD_PI_00730F01
select SOUTHBRIDGE_AMD_PI_AVALON
diff --git a/src/mainboard/amd/db-ft3b-lc/OemCustomize.c b/src/mainboard/amd/db-ft3b-lc/OemCustomize.c
index a7f6fec1af..e90b92802a 100644
--- a/src/mainboard/amd/db-ft3b-lc/OemCustomize.c
+++ b/src/mainboard/amd/db-ft3b-lc/OemCustomize.c
@@ -14,7 +14,6 @@
*/
#include <AGESA.h>
-#include <northbridge/amd/pi/agesawrapper.h>
#include <PlatformMemoryConfiguration.h>
diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c
index 3e9b1c89ca..495ce59eff 100644
--- a/src/mainboard/amd/db-ft3b-lc/romstage.c
+++ b/src/mainboard/amd/db-ft3b-lc/romstage.c
@@ -21,8 +21,6 @@
#include <console/console.h>
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/pi/agesawrapper.h>
-#include <northbridge/amd/pi/agesawrapper_call.h>
#include <cpu/x86/bist.h>
#include <southbridge/amd/pi/hudson/hudson.h>
diff --git a/src/mainboard/amd/lamar/Kconfig b/src/mainboard/amd/lamar/Kconfig
index 5527d59a1b..e216e0260c 100644
--- a/src/mainboard/amd/lamar/Kconfig
+++ b/src/mainboard/amd/lamar/Kconfig
@@ -20,7 +20,7 @@ if BOARD_AMD_LAMAR
config BOARD_SPECIFIC_OPTIONS
def_bool y
- select BINARYPI_LEGACY_WRAPPER
+ #select BINARYPI_LEGACY_WRAPPER
select CPU_AMD_PI_00630F01
select NORTHBRIDGE_AMD_PI_00630F01
select SOUTHBRIDGE_AMD_PI_BOLTON
diff --git a/src/mainboard/amd/lamar/OemCustomize.c b/src/mainboard/amd/lamar/OemCustomize.c
index 2cd013b59a..4c1832b154 100644
--- a/src/mainboard/amd/lamar/OemCustomize.c
+++ b/src/mainboard/amd/lamar/OemCustomize.c
@@ -15,7 +15,6 @@
*/
#include <AGESA.h>
-#include <northbridge/amd/pi/agesawrapper.h>
static const PCIe_PORT_DESCRIPTOR PortList[] = {
diff --git a/src/mainboard/amd/lamar/romstage.c b/src/mainboard/amd/lamar/romstage.c
index 3f7d33f11b..77a0ea02f7 100644
--- a/src/mainboard/amd/lamar/romstage.c
+++ b/src/mainboard/amd/lamar/romstage.c
@@ -21,8 +21,6 @@
#include <console/console.h>
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/pi/agesawrapper.h>
-#include <northbridge/amd/pi/agesawrapper_call.h>
#include <cpu/x86/bist.h>
#include <southbridge/amd/common/amd_defs.h>
#include <southbridge/amd/pi/hudson/hudson.h>
diff --git a/src/mainboard/amd/olivehillplus/Kconfig b/src/mainboard/amd/olivehillplus/Kconfig
index 61ba33d3b9..3a72b2bb19 100644
--- a/src/mainboard/amd/olivehillplus/Kconfig
+++ b/src/mainboard/amd/olivehillplus/Kconfig
@@ -20,7 +20,7 @@ if BOARD_AMD_OLIVEHILLPLUS
config BOARD_SPECIFIC_OPTIONS
def_bool y
- select BINARYPI_LEGACY_WRAPPER
+ #select BINARYPI_LEGACY_WRAPPER
select CPU_AMD_PI_00730F01
select NORTHBRIDGE_AMD_PI_00730F01
select SOUTHBRIDGE_AMD_PI_AVALON
diff --git a/src/mainboard/amd/olivehillplus/OemCustomize.c b/src/mainboard/amd/olivehillplus/OemCustomize.c
index b66a88b7f9..76b7f25522 100644
--- a/src/mainboard/amd/olivehillplus/OemCustomize.c
+++ b/src/mainboard/amd/olivehillplus/OemCustomize.c
@@ -14,7 +14,6 @@
*/
#include <AGESA.h>
-#include <northbridge/amd/pi/agesawrapper.h>
static const PCIe_PORT_DESCRIPTOR PortList[] = {
diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index 0181747c22..6df12e31cc 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -21,8 +21,6 @@
#include <console/console.h>
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/pi/agesawrapper.h>
-#include <northbridge/amd/pi/agesawrapper_call.h>
#include <cpu/x86/bist.h>
#include <southbridge/amd/pi/hudson/hudson.h>
diff --git a/src/mainboard/bap/ode_e21XX/Kconfig b/src/mainboard/bap/ode_e21XX/Kconfig
index 5b0d2fb2f3..a35107d77b 100644
--- a/src/mainboard/bap/ode_e21XX/Kconfig
+++ b/src/mainboard/bap/ode_e21XX/Kconfig
@@ -20,7 +20,7 @@ if BOARD_ODE_E21XX
config BOARD_SPECIFIC_OPTIONS
def_bool y
- select BINARYPI_LEGACY_WRAPPER
+ #select BINARYPI_LEGACY_WRAPPER
select CPU_AMD_PI_00730F01
select NORTHBRIDGE_AMD_PI_00730F01
select SOUTHBRIDGE_AMD_PI_AVALON
diff --git a/src/mainboard/bap/ode_e21XX/OemCustomize.c b/src/mainboard/bap/ode_e21XX/OemCustomize.c
index 008e5da4f4..97aaa4e6d0 100644
--- a/src/mainboard/bap/ode_e21XX/OemCustomize.c
+++ b/src/mainboard/bap/ode_e21XX/OemCustomize.c
@@ -14,7 +14,6 @@
*/
#include <AGESA.h>
-#include <northbridge/amd/pi/agesawrapper.h>
static const PCIe_PORT_DESCRIPTOR PortList[] = {
diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c
index 10b7aabe83..774cd990b6 100644
--- a/src/mainboard/bap/ode_e21XX/romstage.c
+++ b/src/mainboard/bap/ode_e21XX/romstage.c
@@ -21,8 +21,6 @@
#include <console/console.h>
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <northbridge/amd/pi/agesawrapper.h>
-#include <northbridge/amd/pi/agesawrapper_call.h>
#include <cpu/x86/bist.h>
#include <southbridge/amd/pi/hudson/hudson.h>
#include <superio/fintek/common/fintek.h>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-19 16:08:46 +0000