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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-05-03 16:26:05 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-05-05 20:06:33 +0200 |
| commit | 5caf89b9f848bbab199e7e6bd37897f6464e4d23 (patch) | |
| tree | eea935f4cff74566f531bf9d6f0c6b21a3885f81 /src/mainboard | |
| parent | f7dd6d5da13131d5161185c60e757ae4c4406f46 (diff) | |
| download | coreboot-5caf89b9f848bbab199e7e6bd37897f6464e4d23.tar.xz | |
dmp/vortex86ex: Merge northbridge and southbridge into soc
Change-Id: I16c04452d2d6c3205aea29fe8aa8fad8fc485a46
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14600
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/dmp/vortex86ex/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/dmp/vortex86ex/devicetree.cb | 18 | ||||
| -rw-r--r-- | src/mainboard/dmp/vortex86ex/romstage.c | 6 |
3 files changed, 12 insertions, 15 deletions
diff --git a/src/mainboard/dmp/vortex86ex/Kconfig b/src/mainboard/dmp/vortex86ex/Kconfig index f6e5d0c68e..9c4c178f69 100644 --- a/src/mainboard/dmp/vortex86ex/Kconfig +++ b/src/mainboard/dmp/vortex86ex/Kconfig @@ -18,8 +18,7 @@ if BOARD_DMP_EX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select CPU_DMP_VORTEX86EX - select NORTHBRIDGE_DMP_VORTEX86EX - select SOUTHBRIDGE_DMP_VORTEX86EX + select SOC_DMP_VORTEX86EX select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 select ROMCC diff --git a/src/mainboard/dmp/vortex86ex/devicetree.cb b/src/mainboard/dmp/vortex86ex/devicetree.cb index 46dd2436f7..4106bed448 100644 --- a/src/mainboard/dmp/vortex86ex/devicetree.cb +++ b/src/mainboard/dmp/vortex86ex/devicetree.cb @@ -13,18 +13,16 @@ ## GNU General Public License for more details. ## -chip northbridge/dmp/vortex86ex # North Bridge +chip soc/dmp/vortex86ex # North Bridge device domain 0 on device pci 0.0 on end # Host Bridge - chip southbridge/dmp/vortex86ex # South Bridge - device pci 7.0 on end # ISA Bridge - device pci 8.0 on end # Ethernet - device pci a.0 on end # USB 1.1 - device pci a.1 on end # USB 2.0 - device pci b.0 on end # USB 1.1 - device pci b.1 on end # USB 2.0 - device pci c.0 on end # IDE - end + device pci 7.0 on end # ISA Bridge + device pci 8.0 on end # Ethernet + device pci a.0 on end # USB 1.1 + device pci a.1 on end # USB 2.0 + device pci b.0 on end # USB 1.1 + device pci b.1 on end # USB 2.0 + device pci c.0 on end # IDE end # pci domain 0 chip cpu/dmp/vortex86ex end # CPU end diff --git a/src/mainboard/dmp/vortex86ex/romstage.c b/src/mainboard/dmp/vortex86ex/romstage.c index a6aa59b5dc..0b02373952 100644 --- a/src/mainboard/dmp/vortex86ex/romstage.c +++ b/src/mainboard/dmp/vortex86ex/romstage.c @@ -22,9 +22,9 @@ #include <cpu/x86/cache.h> #include <halt.h> #include "drivers/pc80/pc/i8254.c" -#include <northbridge/dmp/vortex86ex/northbridge.h> -#include <southbridge/dmp/vortex86ex/southbridge.h> -#include "northbridge/dmp/vortex86ex/raminit.c" +#include <soc/dmp/vortex86ex/northbridge.h> +#include <soc/dmp/vortex86ex/southbridge.h> +#include "soc/dmp/vortex86ex/raminit.c" #include <cpu/dmp/dmp_post_code.h> #define DMP_CPUID_SX 0x31504d44 |