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| author | Marc Jones <marc.jones@amd.com> | 2008-04-25 21:34:25 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2008-04-25 21:34:25 +0000 |
| commit | 65e08040f912698752b239f499f3efc7f1c0ac0c (patch) | |
| tree | 0d582a6677dae7471309ac1151a3ebf01d09ffc2 /src/mainboard | |
| parent | 7ca3ec2e5c8d03e2b73d9aaaf6758047cd32b433 (diff) | |
| download | coreboot-65e08040f912698752b239f499f3efc7f1c0ac0c.tar.xz | |
Remove inline from FAM10 CPU initialization functions.
This doesn't save any space for me but it is the right thing to allow GCC to
optimize.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c index 5c81720ac3..26c624589c 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c @@ -102,7 +102,7 @@ static void memreset(int controllers, const struct mem_controller *ctrl) } -static inline void activate_spd_rom(const struct mem_controller *ctrl) +static void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_HUB 0x18 int ret,i; @@ -119,7 +119,7 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl) } -static inline int spd_read_byte(u32 device, u32 address) +static int spd_read_byte(u32 device, u32 address) { int result; result = smbus_read_byte(device, address); |