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author | Stefan Reinauer <reinauer@chromium.org> | 2012-03-28 13:19:15 -0700 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-05-01 19:53:53 +0200 |
commit | 8172d0be978d74eaaf103b592b505385db105f67 (patch) | |
tree | f99d3b7c9a82dcee4d4245250f9ee693a1f25e2b /src/mainboard | |
parent | f40a2590acf4db45fa89098b9e406e45ffaffc0c (diff) | |
download | coreboot-8172d0be978d74eaaf103b592b505385db105f67.tar.xz |
Allow more CPU cores on Emerald Lake 2 CRB
The Emerald Lake 2 CRB can potentially have more
than 8 CPU cores, so update the number of max cores
accordingly.
Change-Id: Ia42ed8a84916f66dfbfdf2a72cbbed5cea61899b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/966
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/intel/emeraldlake2/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index 9916aaa264..002ae2a86c 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -37,7 +37,7 @@ config IRQ_SLOT_COUNT config MAX_CPUS int - default 8 + default 16 config MAX_PHYSICAL_CPUS int |