diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-07-15 09:13:04 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 07:28:24 +0100 |
| commit | a9dc05130e1a13cb9f6bf55f46071f4977029273 (patch) | |
| tree | d3abf19b3f90021aa612d082d8e6e24a0a66d486 /src/mainboard | |
| parent | 0cf0d1499ab4fb86a6c85f83ab4097a62e2e3642 (diff) | |
| download | coreboot-a9dc05130e1a13cb9f6bf55f46071f4977029273.tar.xz | |
falco: Enable RTD2132 spread spectrum at 1.0%
This may need further tuning but will start at 1.0%.
boot on falco and check /sys/firmware/log
localhost ~ # grep RTD2132 /sys/firmware/log
RTD2132: Enable 1.0% Spread Spectrum
I2C: 01:35 (Realtek RTD2132 LVDS Bridge)
Change-Id: I96e1c14dbc6a7bfaf1c8deb1806c48bf2fd3e32a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61895
Reviewed-on: http://review.coreboot.org/4366
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/falco/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/falco/devicetree.cb | 8 |
2 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig index e3663deed5..b372c4714e 100644 --- a/src/mainboard/google/falco/Kconfig +++ b/src/mainboard/google/falco/Kconfig @@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CACHE_ROM select MARK_GRAPHICS_MEM_WRCOMB select MONOTONIC_TIMER_MSR + select DRIVERS_I2C_RTD2132 config VBOOT_RAMSTAGE_INDEX hex diff --git a/src/mainboard/google/falco/devicetree.cb b/src/mainboard/google/falco/devicetree.cb index cdd5a2ed05..f5a40e15a3 100644 --- a/src/mainboard/google/falco/devicetree.cb +++ b/src/mainboard/google/falco/devicetree.cb @@ -108,7 +108,13 @@ chip northbridge/intel/haswell end end # LPC bridge device pci 1f.2 on end # SATA Controller - device pci 1f.3 on end # SMBus + device pci 1f.3 on # SMBus + chip drivers/i2c/rtd2132 + # Enable Spread Sprectrum at 1.0% + register "sscg_percent" = "0x10" + device i2c 35 on end + end + end device pci 1f.6 on end # Thermal end end |