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author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-01-24 14:38:10 +0100 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-02-03 03:45:14 +0100 |
commit | c8f54a1109072706e2fa091dc9ab4ad3eb057b42 (patch) | |
tree | 49b2671a0ef999cd2daffc8b55ae426fe225e012 /src/mainboard | |
parent | b5adeee1cc961da60fe72e3226d3a0aeb60306e4 (diff) | |
download | coreboot-c8f54a1109072706e2fa091dc9ab4ad3eb057b42.tar.xz |
lenovo/x230: Enable msata port.
Port 2 is used by msata. Enable it.
Change-Id: Ib75227f64c9d77f6cfca1902a78d63b5cdd23d76
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4789
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/lenovo/x230/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index f630e3d416..a76de5fcd1 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -55,8 +55,8 @@ chip northbridge/intel/sandybridge register "gpi1_routing" = "2" register "gpi8_routing" = "2" - # Enable SATA ports 0 & 1 - register "sata_port_map" = "0x3" + # Enable SATA ports 0 (HDD bay) & 1 (dock) & 2 (msata) + register "sata_port_map" = "0x7" # Set max SATA speed to 6.0 Gb/s register "sata_interface_speed_support" = "0x3" |