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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-10-28 11:08:24 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-11-02 03:25:39 +0100 |
commit | d28474b46d69e683e26443f295ae4a626d7c3b38 (patch) | |
tree | 5db7066dd463e3c8549528dab3485f74b9fb8ff0 /src/mainboard | |
parent | 3b01cf17d28d895ed2eed52213ed2f590f976567 (diff) | |
download | coreboot-d28474b46d69e683e26443f295ae4a626d7c3b38.tar.xz |
asrock/e350m1: Match super-io GPIO configuration with vendor
Disables mouse ps2 data/clock signals, not connected in hardware.
Purpose of other GPIOs is not really known, but match them
with superiotool dump taken from vendor bios.
Change-Id: I7b549fbd7dd3fa4cbd507d76882b60bc324a4bd0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/12214
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/asrock/e350m1/devicetree.cb | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb index 3488e448d2..e8b3ea5b95 100644 --- a/src/mainboard/asrock/e350m1/devicetree.cb +++ b/src/mainboard/asrock/e350m1/devicetree.cb @@ -72,17 +72,34 @@ chip northbridge/amd/agesa/family14/root_complex io 0x60 = 0x100 irq 0x70 = 0 end - device pnp 2e.7 off end # GIPO689 + device pnp 2e.107 off end # GPIO6 + device pnp 2e.207 off end # GPIO7 + device pnp 2e.307 on # GPIO8 + irq 0x23 = 0x28 + irq 0xe4 = 0xbf + irq 0xed = 0x27 + end + device pnp 2e.407 off end # GPIO9 device pnp 2e.8 off end # WDT - device pnp 2e.9 off end # GPIO235 - device pnp 2e.a on end # ACPI + device pnp 2e.009 on # GPIO2 + irq 0x2a = 0x42 + irq 0xe0 = 0xe3 + end + device pnp 2e.109 off end # GPIO3 + device pnp 2e.209 off end # GPIO4 + device pnp 2e.309 off end # GPIO5 + device pnp 2e.a on # ACPI + irq 0xe7 = 0x10 + end device pnp 2e.b on # HW Monitor io 0x60 = 0x290 io 0x62 = 0x0000 # SB-TSI currently not implemented irq 0x70 = 5 end device pnp 2e.c off end # PECI - device pnp 2e.d off end # SUSLED + device pnp 2e.d on # SUSLED + irq 0xec = 0x90 + end device pnp 2e.e off # CIRWKUP io 0x60 = 0x0000 irq 0x70 = 0 |