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author | Nico Huber <nico.huber@secunet.com> | 2015-08-19 15:46:13 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-10-17 06:28:30 +0000 |
commit | ee09d9c65862a31070559ee3bdd1d8dab176451b (patch) | |
tree | c1463873b10068ed7db49fb46f814fe1f7ad2223 /src/mainboard | |
parent | 8d226f2dbfe010fda3aac9734411a0342c560fbb (diff) | |
download | coreboot-ee09d9c65862a31070559ee3bdd1d8dab176451b.tar.xz |
kontron/ktqm77: Tag all four USB3 ports switchable and SS capable
With the introduction of these options in commit b26156e
(bd82x6x/xhci: Set mask of ports switchable between USB2 and USB3.)
the default regressed to disable these capabilities. Maybe other boards
regressed too. I didn't check.
Change-Id: I220896e656d00145618e61d55b74904517c7d855
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11287
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/kontron/ktqm77/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb index b916b0bdd0..ff5d012be4 100644 --- a/src/mainboard/kontron/ktqm77/devicetree.cb +++ b/src/mainboard/kontron/ktqm77/devicetree.cb @@ -44,6 +44,9 @@ chip northbridge/intel/sandybridge register "c2_latency" = "101" # c2 not supported register "p_cnt_throttling_supported" = "1" + register "xhci_switchable_ports" = "0x0f" + register "superspeed_capable_ports" = "0x0f" + device pci 14.0 on end # USB 3.0 Controller device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 |