summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2018-08-03 12:17:34 +0530
committerPatrick Georgi <pgeorgi@google.com>2018-08-06 07:57:34 +0000
commitf5fd9a3e595b8a1ad4fd385c55a74d4baab7ab89 (patch)
tree7da9ee668783d3fbf41ee299ec50bb30d2b0cdb2 /src/mainboard
parent6b0fc80ff2af15d47ff7e8560768c9ed752594c0 (diff)
downloadcoreboot-f5fd9a3e595b8a1ad4fd385c55a74d4baab7ab89.tar.xz
mb/google/octopus/variants/baseboard: Update Power Limit1
Update power limit1 value from 8W to 10W. There is an error in the energy calculation for current VR solution on GLK. Experiments show that when power limit1 set to 10W, gained performance improvement with SoC TDP reaches max (6W) power. BUG=b:79779737 BRANCH=None TEST=Build coreboot for Octopus board. Change-Id: Ic320d442e7401e4be2e8e16d691db4c803f0fdc1 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/27819 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/devicetree.cb7
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl3
2 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index 9cab69c167..b7c7ad264d 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -42,11 +42,10 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_95_64"
register "gpe0_dw3" = "PMC_GPE_N_63_32"
- # PL1 override 8000 mW: Due to error in the energy calculation for
+ # PL1 override 10000 mW: Due to error in the energy calculation for
# current VR solution. Experiments show that SoC TDP max (6W) can
- # be reached when RAPL PL1 is set to 8W.
- # TODO: Need to tune this value on closed chassis system.
- register "tdp_pl1_override_mw" = "8000"
+ # be reached when RAPL PL1 is set to 10W.
+ register "tdp_pl1_override_mw" = "10000"
# Set RAPL PL2 to 15W.
register "tdp_pl2_override_mw" = "15000"
diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
index fb5b590255..0b26129fcf 100644
--- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
+++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
@@ -69,8 +69,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
3000, /* PowerLimitMinimum */
- /* TODO: Need to tune this value on closed chassis system. */
- 8000, /* PowerLimitMaximum */
+ 10000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
200 /* StepSize */