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| author | arch import user (historical) <svn@openbios.org> | 2005-07-06 18:17:43 +0000 |
|---|---|---|
| committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 18:17:43 +0000 |
| commit | fb07bf4acaf7a86b2dd5c38beaa43f5d06c54e7b (patch) | |
| tree | 874af742fb52988ed4553664f8e70dddd203ecb1 /src/mainboard | |
| parent | 59140ccdf384346ab0a6112baee175a01ed5bd9f (diff) | |
| download | coreboot-fb07bf4acaf7a86b2dd5c38beaa43f5d06c54e7b.tar.xz | |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-62
Creator: Yinghai Lu <yhlu@tyan.com>
add eswar code in intel car to disable Hyperthreading
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/tyan/s2735/cache_as_ram_auto.c | 72 |
1 files changed, 0 insertions, 72 deletions
diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/cache_as_ram_auto.c index 4fdf8b5190..80af842f4f 100644 --- a/src/mainboard/tyan/s2735/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2735/cache_as_ram_auto.c @@ -90,46 +90,6 @@ void real_main(unsigned long bist); void amd64_main(unsigned long bist) { -#if 1 -#if 0 - unsigned cmos_result; - int i; - for(i=0;i<2;i++) { - cmos_result = cmos_read(0x10); - outb(cmos_result, 0x80); - } -#endif -__asm__ volatile ( - "movl $(DCACHE_RAM_BASE+DCACHE_RAM_SIZE-4), %esi\n\t" -// "movl $(DCACHE_RAM_SIZE>>2), %ecx\n\t" - "movl $8, %ecx\n\t" -".yin1x:\n\t" - "movl %esi, %eax\n\t" - - "movl $0x2000, %edx\n\t" - "movb %ah, %al\n\t" -".testy1:\n\t" - "outb %al, $0x80\n\t" - "decl %edx\n\t" - "jnz .testy1\n\t" - - "movl (%esi), %eax\n\t" - "cmpb 0xff, %al\n\t" - "je .yin2\n\t" - - "movl $0x2000, %edx\n\t" -".testy2:\n\t" - "outb %al, $0x80\n\t" - "decl %edx\n\t" - "jnz .testy2\n\t" - -".yin2: decl %ecx\n\t" - "je .yout1x\n\t" - "sub $4, %esi\n\t" - "jmp .yin1x\n\t" -".yout1x:\n\t" -); -#endif /* Is this a deliberate reset by the bios */ // post_code(0x22); if (bios_reset_detected() && last_boot_normal()) { @@ -180,38 +140,6 @@ void amd64_main(unsigned long bist) }; unsigned cpu_reset = 0; -#if 1 -__asm__ volatile ( - "movl $(DCACHE_RAM_BASE+DCACHE_RAM_SIZE-4), %esi\n\t" -// "movl $(DCACHE_RAM_SIZE>>2), %ecx\n\t" - "movl $8, %ecx\n\t" -".zin1x:\n\t" - "movl %esi, %eax\n\t" - - "movl $0x2000, %edx\n\t" - "movb %ah, %al\n\t" -".testz1:\n\t" - "outb %al, $0x80\n\t" - "decl %edx\n\t" - "jnz .testz1\n\t" - - "movl (%esi), %eax\n\t" - "cmpb 0xff, %al\n\t" - "je .zin2\n\t" - - "movl $0x2000, %edx\n\t" -".testz2:\n\t" - "outb %al, $0x80\n\t" - "decl %edx\n\t" - "jnz .testz2\n\t" - -".zin2: decl %ecx\n\t" - "je .zout1x\n\t" - "sub $4, %esi\n\t" - "jmp .zin1x\n\t" -".zout1x:\n\t" -); -#endif if (bist == 0) { |