summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorRonald G. Minnich <rminnich@gmail.com>2013-04-18 18:09:24 -0700
committerRonald G. Minnich <rminnich@gmail.com>2013-04-23 04:41:23 +0200
commit2810afa57de26871c99e1c5bb7b3c2fbdcaf4f98 (patch)
tree9c547e62c566cfa3953ecd77562df3ef9c357c71 /src/mainboard
parent2c88cc0696be2b01ebd4df6f7593d8658c8fe419 (diff)
downloadcoreboot-2810afa57de26871c99e1c5bb7b3c2fbdcaf4f98.tar.xz
GOOGLE/SNOW: get graphics working
This adds support for display bring-up on Snow. It includes framebuffer initialization and LCD enable functions. Change-Id: I16e711c97e9d02c916824f621e2313297448732b Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/3116 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/snow/Kconfig2
-rw-r--r--src/mainboard/google/snow/ramstage.c36
2 files changed, 38 insertions, 0 deletions
diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig
index 6d3d7c8bce..c28a98631a 100644
--- a/src/mainboard/google/snow/Kconfig
+++ b/src/mainboard/google/snow/Kconfig
@@ -33,6 +33,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select EXYNOS_DISPLAYPORT
select CHROMEOS
select DRIVER_TI_TPS65090
+ select MAINBOARD_HAS_NATIVE_VGA_INIT
+ select MAINBOARD_DO_NATIVE_VGA_INIT
config MAINBOARD_DIR
string
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index 54d13d38f4..09b51a79fa 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -23,6 +23,7 @@
#include <drivers/ti/tps65090/tps65090.h>
#include <cbmem.h>
#include <delay.h>
+#include <boot/coreboot_tables.h>
#include <arch/cache.h>
#include <arch/exception.h>
#include <arch/gpio.h>
@@ -41,6 +42,41 @@
#define DRAM_SIZE CONFIG_DRAM_SIZE_MB
#define DRAM_END (DRAM_START + DRAM_SIZE) /* plus one... */
+int vbe_mode_info_valid(void);
+int vbe_mode_info_valid(void)
+{
+ return 1;
+}
+
+void fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
+void fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
+{
+ /*
+ * The address returned points at the LCD colormap base. The
+ * 64KiB offset points at the LCD base.
+ */
+ framebuffer->physical_address =
+ (u32)cbmem_find(CBMEM_ID_CONSOLE) + 64*KiB;
+ printk(BIOS_SPEW, "%s: framebuffer->physical address is 0x%llx\n",
+ __func__, framebuffer->physical_address);
+
+ framebuffer->x_resolution = 1366;
+ framebuffer->y_resolution = 768;
+ framebuffer->bits_per_pixel = 16;
+ framebuffer->bytes_per_line =
+ (framebuffer->x_resolution * framebuffer->bits_per_pixel) / 8;
+
+ framebuffer->red_mask_pos = 11;
+ framebuffer->red_mask_size = 5;
+ framebuffer->green_mask_pos = 6;
+ framebuffer->green_mask_size = 5;
+ framebuffer->blue_mask_pos = 0;
+ framebuffer->blue_mask_size = 5;
+ framebuffer->reserved_mask_pos = 0;
+ framebuffer->reserved_mask_size = 0;
+}
+
+
void hardwaremain(int boot_complete);
void main(void)
{