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author | Michael Niewöhner <foss@mniewoehner.de> | 2020-07-25 23:47:44 +0200 |
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committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-07-29 09:25:49 +0000 |
commit | 2a28c816140ca9f5d53e5d550101d189ccd5829d (patch) | |
tree | 451d119c4c25ef474d68d8ee1b712116f22d63a4 /src/mainboard | |
parent | 71a22e3cfc7411e0d0bbff7885d8f5cba33724c4 (diff) | |
download | coreboot-2a28c816140ca9f5d53e5d550101d189ccd5829d.tar.xz |
mb/supermicro/x11-lga1151-series: correct superio interrupts
Add interrupts for all enabled superio devices to quiet the warning
about missing interrupts in devicetree.
Vendor uses interrupt 0x00 for all devices except SUART* and KBC, so
let's do that, too. This also changes SWC from 0x0b to 0x00.
Verified with superiotool on X11SSM-F.
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I7a6dc7345f020e53415a7d0d104ce93ab4b194fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonas Löffelholz
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb | 10 | ||||
-rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb | 10 |
2 files changed, 14 insertions, 6 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb index 074e61bfbc..50767bb35e 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb @@ -112,13 +112,17 @@ chip soc/intel/skylake io 0x62 = 0xa10 io 0x64 = 0xa20 io 0x66 = 0xa30 - irq 0x70 = 0xb + irq 0x70 = 0x00 end device pnp 2e.5 off end # KBC - device pnp 2e.7 on end # GPIO + device pnp 2e.7 on # GPIO + irq 0x70 = 0x00 + end device pnp 2e.b off end # SUART3 device pnp 2e.c off end # SUART4 - device pnp 2e.d on end # iLPC2AHB + device pnp 2e.d on # iLPC2AHB + irq 0x70 = 0x00 + end device pnp 2e.e on # Mailbox io 0x60 = 0xa40 irq 0x70 = 0x00 diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb index 80d2305590..8b0a2a0bd1 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb @@ -99,13 +99,17 @@ chip soc/intel/skylake io 0x62 = 0xa10 io 0x64 = 0xa20 io 0x66 = 0xa30 - irq 0x70 = 0xb + irq 0x70 = 0x00 end device pnp 2e.5 off end # KBC - device pnp 2e.7 on end # GPIO + device pnp 2e.7 on # GPIO + irq 0x70 = 0x00 + end device pnp 2e.b off end # SUART3 device pnp 2e.c off end # SUART4 - device pnp 2e.d on end # iLPC2AHB + device pnp 2e.d on # iLPC2AHB + irq 0x70 = 0x00 + end device pnp 2e.e on # Mailbox io 0x60 = 0xa40 irq 0x70 = 0x00 |