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| author | Furquan Shaikh <furquan@google.com> | 2020-08-28 12:24:22 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-08-31 17:49:38 +0000 |
| commit | 3b72f645132603d8e518abe8651af53b4a732e99 (patch) | |
| tree | 3ded1522b87afc47ff8c8785e96287e9a3626f19 /src/mainboard | |
| parent | 000003ea1e2e741def558806bf24e8507792bf56 (diff) | |
| download | coreboot-3b72f645132603d8e518abe8651af53b4a732e99.tar.xz | |
mb/google/zork: Fix active polarity of REPORT_EN pin in overridetree
GPIO_144 is REPORT_EN pin for the touchscreen controller where 1 means
enable operation and 0 means stop operation. Override tree exposes
this pin as stop GPIO. Thus, it needs to be configured as active low
i.e. 0 = active (stop), 1 = inactive (enable report).
Change-Id: I349123655260349b78d2f75f846da0ce1dc966fc
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/zork/variants/dalboz/overridetree.cb b/src/mainboard/google/zork/variants/dalboz/overridetree.cb index 8735a06921..1ddb17bdf4 100644 --- a/src/mainboard/google/zork/variants/dalboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dalboz/overridetree.cb @@ -86,7 +86,7 @@ chip soc/amd/picasso register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "generic.reset_delay_ms" = "120" register "generic.reset_off_delay_ms" = "1" - register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb index 8ac39c369c..0e35d99ef2 100644 --- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb @@ -56,7 +56,7 @@ chip soc/amd/picasso register "enable_delay_ms" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "reset_delay_ms" = "20" - register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)" + register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)" register "stop_off_delay_ms" = "1" register "has_power_resource" = "1" register "disable_gpio_export_in_crs" = "1" diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index 515c3a64a1..ceacc70738 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -70,7 +70,7 @@ chip soc/amd/picasso register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "generic.reset_delay_ms" = "120" register "generic.reset_off_delay_ms" = "1" - register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index c44ff41955..d415de59c9 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -101,7 +101,7 @@ chip soc/amd/picasso register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "generic.reset_off_delay_ms" = "1" register "generic.reset_delay_ms" = "120" - register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" |