sb/amd/cimx/sb800: Postpone Sb_Poweron_Init() call

With LPC decode enables explicitly set in C env bootblock,
this call can be delayed to happen before AMD_INIT_RESET.

Change-Id: I3a28eaa2cf70b770b022760a2380ded0f43e9a6f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>

11 files changed, 22 insertions, 0 deletions

diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c
index 3454ef8744..43d9da9b5d 100644
--- a/src/mainboard/amd/inagua/romstage.c
+++ b/src/mainboard/amd/inagua/romstage.c
@@ -15,11 +15,13 @@
 
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/smsc/kbc1100/kbc1100.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	kbc1100_early_init(0x2e);
 	kbc1100_early_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c
index 1fbdd4b268..7ccf1674d7 100644
--- a/src/mainboard/amd/persimmon/romstage.c
+++ b/src/mainboard/amd/persimmon/romstage.c
@@ -16,10 +16,12 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/amd/south_station/romstage.c b/src/mainboard/amd/south_station/romstage.c
index 1fbdd4b268..7ccf1674d7 100644
--- a/src/mainboard/amd/south_station/romstage.c
+++ b/src/mainboard/amd/south_station/romstage.c
@@ -16,10 +16,12 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/amd/union_station/romstage.c b/src/mainboard/amd/union_station/romstage.c
index f2b00bc24d..af64ad8b50 100644
--- a/src/mainboard/amd/union_station/romstage.c
+++ b/src/mainboard/amd/union_station/romstage.c
@@ -14,7 +14,9 @@
  */
 
 #include <northbridge/amd/agesa/state_machine.h>
+#include <sb_cimx.h>
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 }
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index 292ecf2b35..27a1fac815 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -16,11 +16,13 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <superio/nuvoton/nct5572d/nct5572d.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, NCT5572D_SP1)
 
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/elmex/pcm205400/romstage.c b/src/mainboard/elmex/pcm205400/romstage.c
index 1fbdd4b268..7ccf1674d7 100644
--- a/src/mainboard/elmex/pcm205400/romstage.c
+++ b/src/mainboard/elmex/pcm205400/romstage.c
@@ -16,10 +16,12 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/gizmosphere/gizmo/romstage.c b/src/mainboard/gizmosphere/gizmo/romstage.c
index 8dec7feb8a..7c3f534527 100644
--- a/src/mainboard/gizmosphere/gizmo/romstage.c
+++ b/src/mainboard/gizmosphere/gizmo/romstage.c
@@ -15,7 +15,9 @@
  */
 
 #include <northbridge/amd/agesa/state_machine.h>
+#include <sb_cimx.h>
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 }
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
index a971c15d52..5e61bddfcc 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
@@ -17,11 +17,13 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f71869ad/f71869ad.h>
+#include <sb_cimx.h>
 
 /* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */
 #define SERIAL_DEV PNP_DEV(0x2e, F71869AD_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c
index 83d5a6dc98..f8e6091af0 100644
--- a/src/mainboard/lippert/frontrunner-af/romstage.c
+++ b/src/mainboard/lippert/frontrunner-af/romstage.c
@@ -15,10 +15,12 @@
 
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c
index 7ca9dcb9f2..ebbe4fc0df 100644
--- a/src/mainboard/lippert/toucan-af/romstage.c
+++ b/src/mainboard/lippert/toucan-af/romstage.c
@@ -16,10 +16,12 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627dhg/w83627dhg.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, W83627DHG_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c
index 89bf3049d6..da0e0d3d5e 100644
--- a/src/mainboard/pcengines/apu1/romstage.c
+++ b/src/mainboard/pcengines/apu1/romstage.c
@@ -21,6 +21,7 @@
 #include <superio/nuvoton/nct5104d/nct5104d.h>
 #include "gpio_ftns.h"
 #include <SB800.h>
+#include <sb_cimx.h>
 
 #define SIO_PORT 0x2e
 #define SERIAL_DEV PNP_DEV(SIO_PORT, NCT5104D_SP1)
@@ -60,6 +61,7 @@ static void early_lpc_init(void)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	early_lpc_init();
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }