summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorTim Wawrzynczak <twawrzynczak@chromium.org>2019-04-26 15:26:15 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-05-06 10:27:28 +0000
commit3fe7c44d501d64cfcc5cd79fbc02f7071bdfda4b (patch)
treeffec57bcaae5ff92e490a25aa8f9eeb0c886e7b5 /src/mainboard
parent939440c48ba47401679dd65930464649398b78db (diff)
downloadcoreboot-3fe7c44d501d64cfcc5cd79fbc02f7071bdfda4b.tar.xz
mainboard/google/hatch: Enable PEN_EJECT_L as wake & notify source.
Updated GPP_A8 to be a GPI and SCI source, to support both wake and notifications. BUG=b:128941098 BRANCH=none TEST=Compiles, simulated pen eject with PCH_INT_L signal. Both evtest and waking from s0ix confirm this works. The output of /proc/interrupts confirms the correct interrupt is triggered. Change-Id: I080fb3cbfb3e2f55209ca31824b00ca820d70f78 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32487 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c4
-rw-r--r--src/mainboard/google/hatch/variants/hatch/overridetree.cb4
-rw-r--r--src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb4
3 files changed, 8 insertions, 4 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 198d930aba..32526cc74b 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -30,8 +30,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL),
/* A7 : PP3300_SOC_A */
PAD_NC(GPP_A7, NONE),
- /* A8 : EMR_GARAGE_DET */
- PAD_CFG_GPI_GPIO_DRIVER(GPP_A8, NONE, DEEP),
+ /* A8 : PEN_GARAGE_DET_L */
+ PAD_CFG_GPI_GPIO_DRIVER_SCI(GPP_A8, NONE, DEEP, LEVEL, NONE),
/* A9 : ESPI_CLK */
/* A10 : FPMCU_PCH_BOOT1 */
PAD_CFG_GPO(GPP_A10, 0, DEEP),
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
index 4b1b8d85f2..42752e68f1 100644
--- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb
@@ -86,7 +86,9 @@ chip soc/intel/cannonlake
end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
- register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)"
+ register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)"
+ register "key.wake" = "GPE0_DW0_08"
+ register "key.wakeup_event_action" = "EV_ACT_ASSERTED"
register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
diff --git a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
index c5d5964663..115a513038 100644
--- a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb
@@ -71,7 +71,9 @@ chip soc/intel/cannonlake
end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
- register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_A8)"
+ register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)"
+ register "key.wake" = "GPE0_DW0_08"
+ register "key.wakeup_event_action" = "EV_ACT_ASSERTED"
register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"