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authorRob Barnes <robbarnes@google.com>2020-10-01 15:16:39 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-10-12 08:37:28 +0000
commit4e86131462786f3a9898d90cfa1602b1e157bb5c (patch)
tree18c9dd086b113d73e1ca8e058fc4acaf5bffea2a /src/mainboard
parentc4a5acdabc28778b49a1c088b0736bac83e2ab51 (diff)
downloadcoreboot-4e86131462786f3a9898d90cfa1602b1e157bb5c.tar.xz
mb/google/zork/dirinboz: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up. BUG=b:158766134 TEST=Boot dirinboz, run integrity test, b:169940185 BRANCH=zork Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I6bac8284b67070ff2c5838257f4ae2ead0e69c22 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45934 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/zork/variants/dirinboz/overridetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
index 905bc886e9..a11fa5e4c7 100644
--- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
@@ -36,6 +36,12 @@ chip soc/amd/picasso
.early_init = true,
}"
+ register "emmc_config" = "{
+ .timing = SD_EMMC_EMMC_HS400,
+ .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A,
+ .init_khz_preset = 400,
+ }"
+
# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
device domain 0 on
subsystemid 0x1022 0x1510 inherit