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authorRonak Kanabar <ronak.kanabar@intel.com>2020-03-09 14:02:51 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-03-26 13:10:49 +0000
commit5e5d9c2d1be190b00fec9e981cbe8bd89a62bb50 (patch)
treefce37a91832b2d24618b22fba0b4022826d916c6 /src/mainboard
parent9ed5a36e98c33f618a090571c8aed4401625206b (diff)
downloadcoreboot-5e5d9c2d1be190b00fec9e981cbe8bd89a62bb50.tar.xz
mb/intel/jasperlake_rvp: add display related UPD configs
Change-Id: Iad0b394dea017223a5b92fff0cb4c2ed1d5a7bd7 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39402 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 9c40f66210..386936eef8 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -18,6 +18,18 @@ chip soc/intel/tigerlake
register "ScsEmmcHs400Enabled" = "1"
register "SdCardPowerEnableActiveHigh" = "1"
+ # Display related UPDs
+ # Select eDP for port A (1 = eDP, 2 = MIPI)
+ register "DdiPortAConfig" = "1"
+
+ # Enable HPD for DDI ports B/C
+ register "DdiPortBHpd" = "1"
+ register "DdiPortCHpd" = "1"
+
+ # Enable DDC for DDI ports B/C
+ register "DdiPortBDdc" = "1"
+ register "DdiPortCDdc" = "1"
+
register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # USB3/2 Type A port1
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # USB2 WWAN
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB2 Bluetooth