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authorAntonello Dettori <dev@dettori.io>2016-11-08 18:44:46 +0100
committerPatrick Georgi <pgeorgi@google.com>2017-03-23 18:52:09 +0100
commit6b542faf202757d6525a31a8e29e1e69540c12e5 (patch)
tree275a62fe5b33461de810559de8bf13f759510e69 /src/mainboard
parent823f7bb9622873fb40f4bdb706dcd83298386290 (diff)
downloadcoreboot-6b542faf202757d6525a31a8e29e1e69540c12e5.tar.xz
mainboard/samsung/lumpy: transition away from device_t
Replace the use of the old device_t definition inside mainboard/samsung/lumpy. Change-Id: I39fe6bad42b3b0772d09d0fa7af357b797b8e04f Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/17303 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/samsung/lumpy/chromeos.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c
index 71d82b5e37..a287c74538 100644
--- a/src/mainboard/samsung/lumpy/chromeos.c
+++ b/src/mainboard/samsung/lumpy/chromeos.c
@@ -31,7 +31,7 @@
#define FLAG_REC_MODE 1
#define FLAG_DEV_MODE 2
-#ifndef __PRE_RAM__
+#ifndef __SIMPLE_DEVICE__
#include <boot/coreboot_tables.h>
#include "ec.h"
#include <ec/smsc/mec1308/ec.h>
@@ -87,10 +87,11 @@ void fill_lb_gpios(struct lb_gpios *gpios)
int get_write_protect_state(void)
{
- device_t dev;
-#ifdef __PRE_RAM__
+#ifdef __SIMPLE_DEVICE__
+ pci_devfn_t dev;
dev = PCI_DEV(0, 0x1f, 2);
#else
+ device_t dev;
dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2));
#endif
return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1;
@@ -98,10 +99,11 @@ int get_write_protect_state(void)
int get_developer_mode_switch(void)
{
- device_t dev;
-#ifdef __PRE_RAM__
+#ifdef __SIMPLE_DEVICE__
+ pci_devfn_t dev;
dev = PCI_DEV(0, 0x1f, 2);
#else
+ device_t dev;
dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2));
#endif
return (pci_read_config32(dev, SATA_SP) >> FLAG_DEV_MODE) & 1;
@@ -109,10 +111,11 @@ int get_developer_mode_switch(void)
int get_recovery_mode_switch(void)
{
- device_t dev;
-#ifdef __PRE_RAM__
+#ifdef __SIMPLE_DEVICE__
+ pci_devfn_t dev;
dev = PCI_DEV(0, 0x1f, 2);
#else
+ device_t dev;
dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2));
#endif
return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1;