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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-24 11:10:50 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-28 14:38:04 +0000
commit8e0bc131c8790489507a90a39f7552e607398679 (patch)
tree12a58e5f745c29724173bb05eff44f043de4e9e3 /src/mainboard
parent7a10c9b10657cb8c02c11c2f73ff5cfaa262304c (diff)
downloadcoreboot-8e0bc131c8790489507a90a39f7552e607398679.tar.xz
AGESA f15: Remove f10 references
Vendorcode for f15 also has f10 support, so AMD_AGESA_FAMILY_10 was never selected. Change-Id: I9a026c36ace88f1110a52d7e24d3e6ab36508932 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21184 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/dinar/rd890_cfg.h5
-rw-r--r--src/mainboard/supermicro/h8qgi/buildOpts.c9
-rw-r--r--src/mainboard/supermicro/h8qgi/rd890_cfg.h5
-rw-r--r--src/mainboard/supermicro/h8qgi/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8scm/rd890_cfg.h5
-rw-r--r--src/mainboard/supermicro/h8scm/romstage.c2
-rw-r--r--src/mainboard/tyan/s8226/buildOpts.c9
-rw-r--r--src/mainboard/tyan/s8226/rd890_cfg.h5
-rw-r--r--src/mainboard/tyan/s8226/romstage.c2
9 files changed, 11 insertions, 33 deletions
diff --git a/src/mainboard/amd/dinar/rd890_cfg.h b/src/mainboard/amd/dinar/rd890_cfg.h
index ac3c8182a3..794c005680 100644
--- a/src/mainboard/amd/dinar/rd890_cfg.h
+++ b/src/mainboard/amd/dinar/rd890_cfg.h
@@ -28,11 +28,10 @@
* [12..15] - Sublink (1..2), If NB connected to full link than Sublink should be set to 0.
*/
#ifndef DEFAULT_HT_PATH
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY10)
-#define DEFAULT_HT_PATH {0x0, 0x3}
-#endif
#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15)
#define DEFAULT_HT_PATH {0x0, 0x1}
+#else /* FAMILY10 */
+#define DEFAULT_HT_PATH {0x0, 0x3}
#endif
#endif
diff --git a/src/mainboard/supermicro/h8qgi/buildOpts.c b/src/mainboard/supermicro/h8qgi/buildOpts.c
index b146afe0d6..e93e83e914 100644
--- a/src/mainboard/supermicro/h8qgi/buildOpts.c
+++ b/src/mainboard/supermicro/h8qgi/buildOpts.c
@@ -425,13 +425,4 @@ CONST AP_MTRR_SETTINGS ROMDATA h8qgi_ap_mtrr_list[] =
* This file include MUST occur AFTER the user option selection settings
*/
-/*
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15)
- #define BLDOPT_REMOVE_FAMILY_10_SUPPORT TRUE
-#endif
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY10)
- #define BLDOPT_REMOVE_FAMILY_15_SUPPORT TRUE
-#endif
-*/
-
#include "MaranelloInstall.h"
diff --git a/src/mainboard/supermicro/h8qgi/rd890_cfg.h b/src/mainboard/supermicro/h8qgi/rd890_cfg.h
index 6607094281..0227c3f54d 100644
--- a/src/mainboard/supermicro/h8qgi/rd890_cfg.h
+++ b/src/mainboard/supermicro/h8qgi/rd890_cfg.h
@@ -27,11 +27,10 @@
* [12..15] - Sublink (1..2), If NB connected to full link than Sublink should be set to 0.
*/
#ifndef DEFAULT_HT_PATH
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY10)
-#define DEFAULT_HT_PATH {0x0, 0x3}
-#endif
#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15)
#define DEFAULT_HT_PATH {0x0, 0x1}
+#else /* FAMILY10 */
+#define DEFAULT_HT_PATH {0x0, 0x3}
#endif
#endif
diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index 79e045156f..031d0a2902 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -25,7 +25,7 @@
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-#include <northbridge/amd/agesa/family10/reset_test.h>
+#include <northbridge/amd/agesa/family15/reset_test.h>
#include <nb_cimx.h>
#include <sb_cimx.h>
#include <superio/nuvoton/wpcm450/wpcm450.h>
diff --git a/src/mainboard/supermicro/h8scm/rd890_cfg.h b/src/mainboard/supermicro/h8scm/rd890_cfg.h
index 6607094281..0227c3f54d 100644
--- a/src/mainboard/supermicro/h8scm/rd890_cfg.h
+++ b/src/mainboard/supermicro/h8scm/rd890_cfg.h
@@ -27,11 +27,10 @@
* [12..15] - Sublink (1..2), If NB connected to full link than Sublink should be set to 0.
*/
#ifndef DEFAULT_HT_PATH
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY10)
-#define DEFAULT_HT_PATH {0x0, 0x3}
-#endif
#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15)
#define DEFAULT_HT_PATH {0x0, 0x1}
+#else /* FAMILY10 */
+#define DEFAULT_HT_PATH {0x0, 0x3}
#endif
#endif
diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c
index d4fdaf2eb0..5d8351d91e 100644
--- a/src/mainboard/supermicro/h8scm/romstage.c
+++ b/src/mainboard/supermicro/h8scm/romstage.c
@@ -25,7 +25,7 @@
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-#include <northbridge/amd/agesa/family10/reset_test.h>
+#include <northbridge/amd/agesa/family15/reset_test.h>
#include <nb_cimx.h>
#include <sb_cimx.h>
#include <superio/nuvoton/wpcm450/wpcm450.h>
diff --git a/src/mainboard/tyan/s8226/buildOpts.c b/src/mainboard/tyan/s8226/buildOpts.c
index e27ec163ee..7c5ea5a34a 100644
--- a/src/mainboard/tyan/s8226/buildOpts.c
+++ b/src/mainboard/tyan/s8226/buildOpts.c
@@ -425,13 +425,4 @@ CONST AP_MTRR_SETTINGS ROMDATA s8226_ap_mtrr_list[] =
* This file include MUST occur AFTER the user option selection settings
*/
-/*
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15)
- #define BLDOPT_REMOVE_FAMILY_10_SUPPORT TRUE
-#endif
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY10)
- #define BLDOPT_REMOVE_FAMILY_15_SUPPORT TRUE
-#endif
-*/
-
#include "SanMarinoInstall.h"
diff --git a/src/mainboard/tyan/s8226/rd890_cfg.h b/src/mainboard/tyan/s8226/rd890_cfg.h
index 6607094281..0227c3f54d 100644
--- a/src/mainboard/tyan/s8226/rd890_cfg.h
+++ b/src/mainboard/tyan/s8226/rd890_cfg.h
@@ -27,11 +27,10 @@
* [12..15] - Sublink (1..2), If NB connected to full link than Sublink should be set to 0.
*/
#ifndef DEFAULT_HT_PATH
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY10)
-#define DEFAULT_HT_PATH {0x0, 0x3}
-#endif
#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15)
#define DEFAULT_HT_PATH {0x0, 0x1}
+#else /* FAMILY10 */
+#define DEFAULT_HT_PATH {0x0, 0x3}
#endif
#endif
diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c
index 5311a87a3b..220098dadd 100644
--- a/src/mainboard/tyan/s8226/romstage.c
+++ b/src/mainboard/tyan/s8226/romstage.c
@@ -25,7 +25,7 @@
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-#include <northbridge/amd/agesa/family10/reset_test.h>
+#include <northbridge/amd/agesa/family15/reset_test.h>
#include <nb_cimx.h>
#include <sb_cimx.h>
#include <superio/winbond/common/winbond.h>