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authorArthur Heymans <arthur@aheymans.xyz>2017-05-05 21:09:32 +0200
committerArthur Heymans <arthur@aheymans.xyz>2017-08-08 10:11:55 +0000
commitb0ac01b4c2c1be06b6618298b77c4a3b32d2411f (patch)
tree5b05990a4b741c94304b0e0133609a196de72964 /src/mainboard
parent2f0d4efa200a23dafadd648dabfc477c872a3175 (diff)
downloadcoreboot-b0ac01b4c2c1be06b6618298b77c4a3b32d2411f.tar.xz
mb/intel/d510mo: Configure clockgen
Configuring the clockgen like vendor bios fixes the issue where the display wobbles from left to right on the analog VGA output. Note: This seems to be common issue/requirement on Intel devices from that generation (also happens on dg43gt). TESTED on Intel D510MO. Change-Id: I08449f0b8b90a1781e6dec91140bf219ea07aaf9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19595 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/d510mo/romstage.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c
index c6406e6f9f..502d22078e 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/romstage.c
@@ -102,6 +102,9 @@ static void rcba_config(void)
void mainboard_romstage_entry(unsigned long bist)
{
const u8 spd_addrmap[4] = { 0x50, 0x51, 0, 0 };
+ const u8 clockgen_block[13] = { 0x61, 0xd9, 0xfe, 0xff, 0xff, 0x00,
+ 0x00, 0x01, 0x03, 0x25, 0x83, 0x17,
+ 0x0d };
int cbmem_was_initted;
int s3resume = 0;
int boot_path;
@@ -125,6 +128,8 @@ void mainboard_romstage_entry(unsigned long bist)
report_bist_failure(bist);
enable_smbus();
+ smbus_block_write(0x69, 0, 13, clockgen_block);
+
pineview_early_initialization();
post_code(0x30);