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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-25 13:54:30 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-25 13:54:30 +0000 |
| commit | d55e26f1b1efe50aa013ad32bdf3e2b58101a64f (patch) | |
| tree | 08e5801c91c46eb3837b90c1828fb7f4b96c0479 /src/mainboard | |
| parent | 7d2a39631efa117d7a5e89810e905a838789518f (diff) | |
| download | coreboot-d55e26f1b1efe50aa013ad32bdf3e2b58101a64f.tar.xz | |
zero warnings days
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5492 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/asus/a8v-e_se/romstage.c | 7 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/m57sli/fanctl.c | 1 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/m57sli/romstage.c | 22 |
3 files changed, 18 insertions, 12 deletions
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index b8a4483aff..3ec90f8010 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -80,7 +80,8 @@ static void activate_spd_rom(const struct mem_controller *ctrl) { } -static void soft_reset(void) +#include <reset.h> +void soft_reset(void) { uint8_t tmp; @@ -98,6 +99,9 @@ static void soft_reset(void) } } +// defines S3_NVRAM_EARLY: +#include "southbridge/via/k8t890/k8t890_early_car.c" + #define K8_4RANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/amdk8.h" @@ -107,7 +111,6 @@ static void soft_reset(void) #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "southbridge/via/k8t890/k8t890_early_car.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/gigabyte/m57sli/fanctl.c b/src/mainboard/gigabyte/m57sli/fanctl.c index e411d8faee..07a2666cdf 100644 --- a/src/mainboard/gigabyte/m57sli/fanctl.c +++ b/src/mainboard/gigabyte/m57sli/fanctl.c @@ -1,5 +1,6 @@ #include <arch/io.h> #include <stdlib.h> +#include <superio/ite/it8716f/it8716f.h> static void write_index(uint16_t port_base, uint8_t reg, uint8_t value) { diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 45ad9f9358..f329c661e6 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -98,16 +98,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" -#include "northbridge/amd/amdk8/incoherent_ht.c" -#include "northbridge/amd/amdk8/coherent_ht.c" -#include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" - -#include "resourcemap.c" - -#include "cpu/amd/dualcore/dualcore.c" - #define MCP55_NUM 1 #define MCP55_USE_NIC 1 #define MCP55_USE_AZA 1 @@ -125,6 +115,18 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h" #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c" + + +#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/incoherent_ht.c" +#include "northbridge/amd/amdk8/coherent_ht.c" +#include "northbridge/amd/amdk8/raminit_f.c" +#include "lib/generic_sdram.c" + +#include "resourcemap.c" + +#include "cpu/amd/dualcore/dualcore.c" + #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" |