SB800: Add IMC ROM and fan control.

Add configuration for AMD's IMC ROM and fan registers for cimx/sb800
platforms.

- Allows user to add the IMC rom to the build and to configure the
  location of the "signature" between the allowed positions.
- Allows for no fan control, manual setup of SB800 Fan registers, or
  setup of the IMC fan configuration registers.
- Register configuration is done through devicetree.cb. No files need
  to be added for new platform configuration.
- Initial setup is for Persimmon, but may be extended to any cimx/sb800
  platform.

Change-Id: Ib06408d794988cbb29eed6adbeeadea8b2629bae
Signed-off-by: Martin Roth <martin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1977
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Marc Jones <marcj303@gmail.com>

1 files changed, 49 insertions, 0 deletions

diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb
index 178fd76eef..bd40a43a62 100644
--- a/src/mainboard/amd/persimmon/devicetree.cb
+++ b/src/mainboard/amd/persimmon/devicetree.cb
@@ -91,6 +91,55 @@ chip northbridge/amd/agesa/family14/root_complex
 				device pci 16.2 off end # EHCI USB3
 				register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
 				register "boot_switch_sata_ide" = "0"	# 0: boot from SATA. 1: IDE
+
+				#set up SB800 Fan control registers and IMC fan controls
+				register "imc_port_address" = "0x6E"	# 0x2E and 0x6E are common
+				register "fan0_enabled" = "1"
+				register "fan1_enabled" = "1"
+				register "imc_fan_zone0_enabled" = "1"
+				register "imc_fan_zone1_enabled" = "1"
+
+				register "fan0_config_vals" = "{ \
+					FAN_INPUT_INTERNAL_DIODE, FAN_POLARITY_HIGH, \
+					FREQ_25KHZ, 0x08, 0x00, 0x00, 0x00, 0x00,\
+					0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }"
+				register "fan1_config_vals" = "{ \
+					FAN_INPUT_INTERNAL_DIODE, FAN_POLARITY_HIGH, \
+					FREQ_25KHZ, 0x10, 0x00, 0x00, 0x00, 0x00, \
+					0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }"
+
+				register "imc_zone0_mode1" = " \
+					IMC_MODE1_FAN_ENABLED | IMC_MODE1_FAN_IMC_CONTROLLED | \
+					IMC_MODE1_FAN_STEP_MODE | IMC_MODE1_FANOUT0"
+				register "imc_zone0_mode2" = " IMC_MODE2_TEMPIN_SB_TSI | \
+					IMC_MODE2_FANIN0 | IMC_MODE2_TEMP_AVERAGING_DISABLED"
+				register "imc_zone0_temp_offset" = "0x00"	# No temp offset
+				register "imc_zone0_hysteresis" = "0x05"	# Degrees C Hysteresis
+				register "imc_zone0_smbus_addr" = "0x98"	# Temp Sensor SMBus address
+				register "imc_zone0_smbus_num" = "IMC_TEMP_SENSOR_ON_SMBUS_3"	# SMBUS number
+				register "imc_zone0_pwm_step" = "0x01"		# Fan PWM stepping rate
+				register "imc_zone0_ramping" = "0x00"		# Disable Fan PWM ramping and stepping
+
+				register "imc_zone1_mode1" = " \
+					IMC_MODE1_FAN_ENABLED | IMC_MODE1_FAN_IMC_CONTROLLED | \
+					IMC_MODE1_FAN_STEP_MODE | IMC_MODE1_FANOUT1"
+				register "imc_zone1_mode2" = " IMC_MODE2_TEMPIN_SB_TSI | \
+					IMC_MODE2_FANIN1 | IMC_MODE2_TEMP_AVERAGING_DISABLED"
+				register "imc_zone1_temp_offset" = "0x00"	# No temp offset
+				register "imc_zone1_hysteresis" = "0x05"	# Degrees C Hysteresis
+				register "imc_zone1_smbus_addr" = "0x98"	# Temp Sensor SMBus address
+				register "imc_zone1_smbus_num" = "IMC_TEMP_SENSOR_ON_SMBUS_3"	# SMBUS number
+				register "imc_zone1_pwm_step" = "0x01"		# Fan PWM stepping rate
+				register "imc_zone1_ramping" = "0x00"		# Disable Fan PWM ramping and stepping
+
+				# T56N has a Maximum operating temperature  of 90C
+				# ZONEX_THRESHOLDS - _AC0 - _AC7, _CRT - Temp Threshold in degrees C
+				# ZONEX_FANSPEEDS - Fan speeds as a "percentage"
+				register "imc_zone0_thresholds" = "{ 87, 82, 77, 72, 65, 1, 0, 0, 90 }"
+				register "imc_zone0_fanspeeds"  = "{100,  7,  5,  4,  3, 2, 0, 0 }"
+				register "imc_zone1_thresholds" = "{ 85, 80, 75, 65,  1, 0, 0, 0, 90 }"
+				register "imc_zone1_fanspeeds"  = "{100, 10,  6,  4,  3, 0, 0, 0 }"
+
 			end	#southbridge/amd/cimx/sb800
 #			end #  device pci 18.0
 # These seem unnecessary