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authorIru Cai <mytbk920423@gmail.com>2017-09-01 10:17:27 +0800
committerMartin Roth <martinroth@google.com>2017-09-02 15:25:05 +0000
commite9edd270993988fcf69f79c4228f0cd81a221df8 (patch)
tree8ee81b282ad258539b7f6263e26e2a7b1b841e2a /src/mainboard
parentdb6153dc80b2179336bc19ad31a7235f0102695f (diff)
downloadcoreboot-e9edd270993988fcf69f79c4228f0cd81a221df8.tar.xz
mb/hp: Enable ExpressCard hotplug in all Elitebooks
The MPC.HPCE bit of the ExpressCard root port is not set in vendor firmware, so autoport didn't generate the right pcie_hotplug_map to support ExpressCard hotplug. Also add comments for each PCIe root port. Change-Id: Ic53e36a7192b9bfa8ff9fca57f4556e972e2611b Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/21310 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/hp/2570p/devicetree.cb8
-rw-r--r--src/mainboard/hp/2760p/devicetree.cb6
-rw-r--r--src/mainboard/hp/8460p/devicetree.cb10
-rw-r--r--src/mainboard/hp/8470p/devicetree.cb8
4 files changed, 16 insertions, 16 deletions
diff --git a/src/mainboard/hp/2570p/devicetree.cb b/src/mainboard/hp/2570p/devicetree.cb
index 6dcfb61605..753d28661f 100644
--- a/src/mainboard/hp/2570p/devicetree.cb
+++ b/src/mainboard/hp/2570p/devicetree.cb
@@ -56,7 +56,7 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2"
register "p_cnt_throttling_supported" = "1"
- register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
+ register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x33"
@@ -89,13 +89,13 @@ chip northbridge/intel/sandybridge
device pci 1c.0 on # PCIe Port #1
subsystemid 0x103c 0x17df
end
- device pci 1c.1 on # PCIe Port #2
+ device pci 1c.1 on # PCIe Port #2, ExpressCard
subsystemid 0x103c 0x17df
end
- device pci 1c.2 on # PCIe Port #3
+ device pci 1c.2 on # PCIe Port #3, SD/MMC
subsystemid 0x103c 0x17df
end
- device pci 1c.3 on # PCIe Port #4
+ device pci 1c.3 on # PCIe Port #4, WLAN
subsystemid 0x103c 0x17df
end
device pci 1c.4 off # PCIe Port #5
diff --git a/src/mainboard/hp/2760p/devicetree.cb b/src/mainboard/hp/2760p/devicetree.cb
index 5728ad9f9d..e63b69cd84 100644
--- a/src/mainboard/hp/2760p/devicetree.cb
+++ b/src/mainboard/hp/2760p/devicetree.cb
@@ -65,7 +65,7 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x007c0281"
register "gpi6_routing" = "2"
register "p_cnt_throttling_supported" = "1"
- register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
+ register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x21"
@@ -94,10 +94,10 @@ chip northbridge/intel/sandybridge
device pci 1c.0 on # PCIe Port #1
subsystemid 0x103c 0x162a
end
- device pci 1c.1 on # PCIe Port #2
+ device pci 1c.1 on # PCIe Port #2, ExpressCard
subsystemid 0x103c 0x162a
end
- device pci 1c.2 on # PCIe Port #3
+ device pci 1c.2 on # PCIe Port #3, SD/MMC
subsystemid 0x103c 0x162a
end
device pci 1c.3 on # WLAN
diff --git a/src/mainboard/hp/8460p/devicetree.cb b/src/mainboard/hp/8460p/devicetree.cb
index 4b1df4a5ac..866f57edf2 100644
--- a/src/mainboard/hp/8460p/devicetree.cb
+++ b/src/mainboard/hp/8460p/devicetree.cb
@@ -64,7 +64,7 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2"
register "p_cnt_throttling_supported" = "1"
- register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
+ register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x3b"
@@ -94,13 +94,13 @@ chip northbridge/intel/sandybridge
device pci 1c.0 on # PCIe Port #1
subsystemid 0x103c 0x161c
end
- device pci 1c.1 on # PCIe Port #2
+ device pci 1c.1 on # PCIe Port #2, ExpressCard
subsystemid 0x103c 0x161c
end
- device pci 1c.2 on # PCIe Port #3
+ device pci 1c.2 on # PCIe Port #3, SD/MMC
subsystemid 0x103c 0x161c
end
- device pci 1c.3 on # PCIe Port #4
+ device pci 1c.3 on # PCIe Port #4, WLAN
subsystemid 0x103c 0x161c
end
device pci 1c.4 off # PCIe Port #5
@@ -109,7 +109,7 @@ chip northbridge/intel/sandybridge
end
device pci 1c.6 off # PCIe Port #7
end
- device pci 1c.7 on # PCIe Port #8
+ device pci 1c.7 on # PCIe Port #8, NEC USB 3.0 Host Controller
subsystemid 0x103c 0x161c
end
device pci 1d.0 on # USB2 EHCI #1
diff --git a/src/mainboard/hp/8470p/devicetree.cb b/src/mainboard/hp/8470p/devicetree.cb
index 6bacccaa4a..b7254bb38d 100644
--- a/src/mainboard/hp/8470p/devicetree.cb
+++ b/src/mainboard/hp/8470p/devicetree.cb
@@ -65,7 +65,7 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2"
register "p_cnt_throttling_supported" = "1"
- register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
+ register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x3b"
@@ -101,13 +101,13 @@ chip northbridge/intel/sandybridge
device pci 1c.0 on # PCIe Port #1
subsystemid 0x103c 0x179b
end
- device pci 1c.1 on # PCIe Port #2
+ device pci 1c.1 on # PCIe Port #2, ExpressCard
subsystemid 0x103c 0x179b
end
- device pci 1c.2 on # PCIe Port #3
+ device pci 1c.2 on # PCIe Port #3, SD/MMC
subsystemid 0x103c 0x179b
end
- device pci 1c.3 on # PCIe Port #4
+ device pci 1c.3 on # PCIe Port #4, WLAN
subsystemid 0x103c 0x179b
end
device pci 1c.4 off # PCIe Port #5