nb/intel/i945: Use parallel MP init

Use the parallel mp init path to initialize AP's. This should result
in a moderate speedup.

Tested on Intel D945GCLF (1 core 2 threads), still boots fine and is
26ms faster compared to lapic_cpu_init.

This removes the option to disable HT siblings.

Change-Id: I955551b99e9cbc397f99c2a6bd355c6070390bcb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/25600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>

18 files changed, 0 insertions, 18 deletions

diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
index ad126cab74..cf1bc4566e 100644
--- a/src/mainboard/apple/macbook21/cmos.default
+++ b/src/mainboard/apple/macbook21/cmos.default
@@ -1,6 +1,5 @@
 boot_option=Fallback
 debug_level=Debug
-hyper_threading=Enable
 nmi=Enable
 boot_devices=''
 boot_default=0x40
diff --git a/src/mainboard/apple/macbook21/cmos.layout b/src/mainboard/apple/macbook21/cmos.layout
index 554d608ad2..39bf6080a2 100644
--- a/src/mainboard/apple/macbook21/cmos.layout
+++ b/src/mainboard/apple/macbook21/cmos.layout
@@ -53,7 +53,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge
diff --git a/src/mainboard/asus/p5gc-mx/cmos.default b/src/mainboard/asus/p5gc-mx/cmos.default
index 2cb37df6c6..e842a7dcb8 100644
--- a/src/mainboard/asus/p5gc-mx/cmos.default
+++ b/src/mainboard/asus/p5gc-mx/cmos.default
@@ -1,6 +1,5 @@
 boot_option=Fallback
 debug_level=Debug
-hyper_threading=Enable
 nmi=Enable
 boot_devices=''
 gfx_uma_size=8M
diff --git a/src/mainboard/asus/p5gc-mx/cmos.layout b/src/mainboard/asus/p5gc-mx/cmos.layout
index 4ca560c91a..187b910d36 100644
--- a/src/mainboard/asus/p5gc-mx/cmos.layout
+++ b/src/mainboard/asus/p5gc-mx/cmos.layout
@@ -31,7 +31,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge
diff --git a/src/mainboard/getac/p470/cmos.layout b/src/mainboard/getac/p470/cmos.layout
index f05485147a..fd627a5835 100644
--- a/src/mainboard/getac/p470/cmos.layout
+++ b/src/mainboard/getac/p470/cmos.layout
@@ -53,7 +53,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default
index 2cb37df6c6..e842a7dcb8 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default
@@ -1,6 +1,5 @@
 boot_option=Fallback
 debug_level=Debug
-hyper_threading=Enable
 nmi=Enable
 boot_devices=''
 gfx_uma_size=8M
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout
index bdc264b911..881fd41921 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout
@@ -52,7 +52,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge
diff --git a/src/mainboard/ibase/mb899/cmos.layout b/src/mainboard/ibase/mb899/cmos.layout
index 5b1799bd95..daa2999d44 100644
--- a/src/mainboard/ibase/mb899/cmos.layout
+++ b/src/mainboard/ibase/mb899/cmos.layout
@@ -52,7 +52,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge
diff --git a/src/mainboard/intel/d945gclf/cmos.default b/src/mainboard/intel/d945gclf/cmos.default
index 2cb37df6c6..e842a7dcb8 100644
--- a/src/mainboard/intel/d945gclf/cmos.default
+++ b/src/mainboard/intel/d945gclf/cmos.default
@@ -1,6 +1,5 @@
 boot_option=Fallback
 debug_level=Debug
-hyper_threading=Enable
 nmi=Enable
 boot_devices=''
 gfx_uma_size=8M
diff --git a/src/mainboard/intel/d945gclf/cmos.layout b/src/mainboard/intel/d945gclf/cmos.layout
index bdc264b911..881fd41921 100644
--- a/src/mainboard/intel/d945gclf/cmos.layout
+++ b/src/mainboard/intel/d945gclf/cmos.layout
@@ -52,7 +52,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge
diff --git a/src/mainboard/kontron/986lcd-m/cmos.layout b/src/mainboard/kontron/986lcd-m/cmos.layout
index dfa0cad4b0..135c19acdc 100644
--- a/src/mainboard/kontron/986lcd-m/cmos.layout
+++ b/src/mainboard/kontron/986lcd-m/cmos.layout
@@ -52,7 +52,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge
diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
index d6479afff8..af865f16da 100644
--- a/src/mainboard/lenovo/t60/cmos.default
+++ b/src/mainboard/lenovo/t60/cmos.default
@@ -1,6 +1,5 @@
 boot_option=Fallback
 debug_level=Debug
-hyper_threading=Enable
 nmi=Enable
 boot_devices=''
 boot_default=0x41
diff --git a/src/mainboard/lenovo/t60/cmos.layout b/src/mainboard/lenovo/t60/cmos.layout
index fd6b25fa1a..d7ff0f2907 100644
--- a/src/mainboard/lenovo/t60/cmos.layout
+++ b/src/mainboard/lenovo/t60/cmos.layout
@@ -69,7 +69,6 @@ entries
 #938         7       r       0        unused
 
 # coreboot config options: cpu
-944          1       e       2        hyper_threading
 #945         3       r       0        unused
 
 # coreboot config options: ec
diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
index f17d57c6dc..5c3576d1f3 100644
--- a/src/mainboard/lenovo/x60/cmos.default
+++ b/src/mainboard/lenovo/x60/cmos.default
@@ -1,6 +1,5 @@
 boot_option=Fallback
 debug_level=Debug
-hyper_threading=Enable
 nmi=Enable
 boot_devices=''
 boot_default=0x40
diff --git a/src/mainboard/lenovo/x60/cmos.layout b/src/mainboard/lenovo/x60/cmos.layout
index b5a31ca091..bfc78bc414 100644
--- a/src/mainboard/lenovo/x60/cmos.layout
+++ b/src/mainboard/lenovo/x60/cmos.layout
@@ -69,7 +69,6 @@ entries
 #938         6       r       0        unused
 
 # coreboot config options: cpu
-944          1       e       2        hyper_threading
 #945         4       r       0        unused
 
 # coreboot config options: ec
diff --git a/src/mainboard/lenovo/z61t/cmos.default b/src/mainboard/lenovo/z61t/cmos.default
index d6479afff8..af865f16da 100644
--- a/src/mainboard/lenovo/z61t/cmos.default
+++ b/src/mainboard/lenovo/z61t/cmos.default
@@ -1,6 +1,5 @@
 boot_option=Fallback
 debug_level=Debug
-hyper_threading=Enable
 nmi=Enable
 boot_devices=''
 boot_default=0x41
diff --git a/src/mainboard/lenovo/z61t/cmos.layout b/src/mainboard/lenovo/z61t/cmos.layout
index bb3b94ae60..b9e2b4494a 100644
--- a/src/mainboard/lenovo/z61t/cmos.layout
+++ b/src/mainboard/lenovo/z61t/cmos.layout
@@ -68,7 +68,6 @@ entries
 #938         7       r       0        unused
 
 # coreboot config options: cpu
-944          1       e       2        hyper_threading
 #945         3       r       0        unused
 
 # coreboot config options: ec
diff --git a/src/mainboard/roda/rk886ex/cmos.layout b/src/mainboard/roda/rk886ex/cmos.layout
index 618745a705..57ffa43e73 100644
--- a/src/mainboard/roda/rk886ex/cmos.layout
+++ b/src/mainboard/roda/rk886ex/cmos.layout
@@ -53,7 +53,6 @@ entries
 #399          1       r       0        unused
 
 # coreboot config options: cpu
-400          1       e       2        hyper_threading
 #401          7       r       0        unused
 
 # coreboot config options: southbridge