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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-09 19:34:16 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-11-11 02:07:42 +0100
commitf89a05ed9f7307df32ef5fa1fd558db7f594c269 (patch)
treedaa6f2126e9bcafc890d48f7e95805ba401bd09c /src/mainboard
parent2b206775fa5e956772b54295a563c5a69e2117b6 (diff)
downloadcoreboot-f89a05ed9f7307df32ef5fa1fd558db7f594c269.tar.xz
southbridge/amd/sb700: Indicate iSATA/eSATA port type
Change-Id: I8ee757d07c82c151b36def6b709163ff144d244f Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11984 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/asus/kgpe-d16/mainboard.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c
index d71df9e38f..65029d45af 100644
--- a/src/mainboard/asus/kgpe-d16/mainboard.c
+++ b/src/mainboard/asus/kgpe-d16/mainboard.c
@@ -95,6 +95,22 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev)
pci_write_config16(dev, 0xaa, 0xa07a);
}
+/* override the default SATA port setup */
+void sb7xx_51xx_setup_sata_port_indication(void *sata_bar5)
+{
+ uint32_t dword;
+
+ /* RPR7.9 Program Port Indication Registers */
+ dword = read32(sata_bar5 + 0xf8);
+ dword &= ~(0x3f << 12); /* All ports are iSATA */
+ dword &= ~0x3f;
+ write32(sata_bar5 + 0xf8, dword);
+
+ dword = read32(sata_bar5 + 0xfc);
+ dword &= ~(0x1 << 20); /* No eSATA ports are present */
+ write32(sata_bar5 + 0xfc, dword);
+}
+
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};