mb/siemens/mc_apl2/gpio: Fix code style

Use the 96 character limit for pad macros.

Change-Id: I03fd2f9309c04628c46e3473bed280edc57e215c
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44470
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>

1 files changed, 57 insertions, 114 deletions

diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
index b770bdcbee..4bf4bb5235 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
@@ -53,11 +53,9 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF_IOSSTATE(GPIO_171, UP_20K, DEEP, NF1, HIZCRx1),
 
 	/* SDCARD_CLK */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* SDCARD_D0 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* SDCARD_D1 */
 	PAD_CFG_NF_IOSSTATE(GPIO_174, UP_20K, DEEP, NF1, HIZCRx1),
 	/* SDCARD_D2 */
@@ -67,8 +65,7 @@ static const struct pad_config gpio_table[] = {
 	/* SDCARD_CD_1V8# */
 	PAD_CFG_NF(GPIO_177, NONE, DEEP, NF1),
 	/* SDCARD_CMD */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_178, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_178, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* Not connected */
 	PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1),
 	/* SDCARD_WP_1V8 */
@@ -79,42 +76,31 @@ static const struct pad_config gpio_table[] = {
 	/* West Community */
 
 	/* I2C_PM_DATA_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_124, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_124, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_PM_CLK_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_125, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_125, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_CAM0_DATA_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_CAM0_CLK_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_CAM1_DATA_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_128, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_128, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_CAM1_CLK_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_129, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_129, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_GP_DATA_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_130, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_130, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_GP_CLK_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_131, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_131, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_LCD_DATA_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* I2C_LCD_CLK_1V8 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, UP_1K, DEEP, NF1, Tx1RxDCRx1,
-				    MASK),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, UP_1K, DEEP, NF1, Tx1RxDCRx1, MASK),
 	/* Not connected */
 	PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_134, UP_20K, DEEP, Tx0RxDCRx0, MASK),
 	/* Not connected */
 	PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_135, UP_20K, DEEP, Tx0RxDCRx0, MASK),
 	/* GPIO_PWRBTN# */
-	PAD_CFG_GPI_SCI_IOS(GPIO_136, UP_20K, DEEP, EDGE_SINGLE, INVERT,
-			    TxDRxE, SAME),
+	PAD_CFG_GPI_SCI_IOS(GPIO_136, UP_20K, DEEP, EDGE_SINGLE, INVERT, TxDRxE, SAME),
 
 	/* HDA_BCLK_1V8 */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_146, DN_20K, DEEP, NF3, MASK, SAME),
@@ -147,19 +133,15 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_GPI_INT(OSC_CLK_OUT_4, DN_20K, DEEP, OFF),
 
 	/* PM_CHARGER_PRSNT */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_AC_PRESENT, DN_20K, DEEP, NF1, MASK,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_AC_PRESENT, DN_20K, DEEP, NF1, MASK, SAME),
 	/* PM_BATLOW# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_BATLOW_B, UP_20K, DEEP, NF1, MASK,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_BATLOW_B, UP_20K, DEEP, NF1, MASK, SAME),
 	/* PMU_PLTRST# */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_PLTRST_B, NONE, DEEP, NF1, MASK, SAME),
 	/* PMU_PWRBTN# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_PWRBTN_B, UP_20K, DEEP, NF1, MASK,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_PWRBTN_B, UP_20K, DEEP, NF1, MASK, SAME),
 	/* SYS_RESET# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_RESETBUTTON_B, NONE, DEEP, NF1, MASK,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_RESETBUTTON_B, NONE, DEEP, NF1, MASK, SAME),
 	/* PMU_SLP_S0# */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(PMU_SLP_S0_B, NONE, DEEP, NF1, MASK, SAME),
 	/* PMU_SLP_S3# */
@@ -198,12 +180,9 @@ static const struct pad_config gpio_table[] = {
 	/* Not connected */
 	PAD_CFG_NF(GPIO_191, DN_20K, DEEP, NF1),
 	PAD_CFG_NF(GPIO_192, DN_20K, DEEP, NF1),
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_193, DN_20K, DEEP, NF1, Tx0RxDCRx0,
-				    SAME),
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_194, DN_20K, DEEP, NF1, Tx0RxDCRx0,
-				    SAME),
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_195, DN_20K, DEEP, NF1, Tx0RxDCRx0,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_193, DN_20K, DEEP, NF1, Tx0RxDCRx0, SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_194, DN_20K, DEEP, NF1, Tx0RxDCRx0, SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_195, DN_20K, DEEP, NF1, Tx0RxDCRx0, SAME),
 
 	/* EDP_VDD_EN_1V8  (DNI) - Alternative stuffing option for
 	 * PTN3460 LVDS_VDD_EN.
@@ -228,10 +207,8 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2),
 
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_201, DN_20K, DEEP, NF1, Tx0RxDCRx0,
-				    SAME),
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_202, DN_20K, DEEP, NF1, Tx0RxDCRx0,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_201, DN_20K, DEEP, NF1, Tx0RxDCRx0, SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_202, DN_20K, DEEP, NF1, Tx0RxDCRx0, SAME),
 
 	/* USB2_OC0_1V8# - Connected to (USB0_OC#:MUX_SEL[USB2_OTG_0/USB2_6]),
 	 * (USB1_OC#:USB1), (USB2_OC#:USB2)
@@ -243,34 +220,26 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_204, UP_20K, DEEP, NF1, MASK, SAME),
 
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_FS0, UP_20K, DEEP, NF1, TxLASTRxE,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_FS0, UP_20K, DEEP, NF1, TxLASTRxE, SAME),
 	/* EDP_HPD# - from HPDRX pin of PTN3460 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_FS1, UP_20K, DEEP, NF2, TxLASTRxE,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_FS1, UP_20K, DEEP, NF2, TxLASTRxE, SAME),
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_FS2, UP_20K, DEEP, NF1, TxLASTRxE,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_FS2, UP_20K, DEEP, NF1, TxLASTRxE, SAME),
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_RXD, DN_20K, DEEP, NF1, TxLASTRxE,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_RXD, DN_20K, DEEP, NF1, TxLASTRxE, SAME),
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_TXD, DN_20K, DEEP, NF1, TxLASTRxE,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_TXD, DN_20K, DEEP, NF1, TxLASTRxE, SAME),
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_CLK, DN_20K, DEEP, NF1, TxLASTRxE,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMC_SPI_CLK, DN_20K, DEEP, NF1, TxLASTRxE, SAME),
 
 	/* Not connected */
 	PAD_CFG_NF(PMIC_PWRGOOD, UP_20K, DEEP, NF1),
 	PAD_CFG_TERM_GPO(GPIO_214, 1, DN_20K, DEEP),
 	PAD_CFG_TERM_GPO(GPIO_215, 1, DN_20K, DEEP),
 	/* THERMTRIP_1V8# - Connected to CPLD */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PMIC_THERMTRIP_B, UP_20K, DEEP, NF1,
-				    TxLASTRxE, SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PMIC_THERMTRIP_B, UP_20K, DEEP, NF1, TxLASTRxE, SAME),
 	/* PROCHOT_CPU#  - Connected to CPLD */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(PROCHOT_B, UP_20K, DEEP, NF1, HIZCRx1,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(PROCHOT_B, UP_20K, DEEP, NF1, HIZCRx1, SAME),
 
 	/* Not connected */
 	PAD_CFG_GPI_INT(PMIC_I2C_SCL, DN_20K, DEEP, OFF),
@@ -342,8 +311,7 @@ static const struct pad_config gpio_table[] = {
 	/* FST_SPI_CLK_1V8.  Goes to both module SPI chip and carrier board. */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_103, NATIVE, DEEP, NF1, MASK, SAME),
 	/* FST_SPI_CLK_FB */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(FST_SPI_CLK_FB, NONE, DEEP, NF1, MASK,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(FST_SPI_CLK_FB, NONE, DEEP, NF1, MASK, SAME),
 
 	/* SIO_SPI_CLK_1V8 - Connected to ESPI_CK of SMARC connector. */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_104, DN_20K, DEEP, NF1, HIZCRx0, ENPD),
@@ -436,8 +404,7 @@ static const struct pad_config gpio_table[] = {
 	 * Module. Pulled up on Module. Driven by Open Drain (OD) part on
 	 * Carrier.
 	 */
-	PAD_CFG_GPI_SCI_IOS(GPIO_22, UP_20K, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
-			    SAME),
+	PAD_CFG_GPI_SCI_IOS(GPIO_22, UP_20K, DEEP, EDGE_SINGLE, INVERT, TxDRxE, SAME),
 	/* LID_CPU_1V8# - Connect to the SMARC Connector LID# pin.
 	 * Lid open/close indication to Module. Low indicates lid closure
 	 * (which system may use to initiate a sleep state). Carrier to float
@@ -445,8 +412,7 @@ static const struct pad_config gpio_table[] = {
 	 * de-bounced on the Module Pulled up on Module. Driven by OD part on
 	 * Carrier.
 	 */
-	PAD_CFG_GPI_SCI_IOS(GPIO_23, UP_20K, DEEP, EDGE_BOTH, INVERT, TxDRxE,
-			    SAME),
+	PAD_CFG_GPI_SCI_IOS(GPIO_23, UP_20K, DEEP, EDGE_BOTH, INVERT, TxDRxE, SAME),
 	/* WDT_IRQ1_1V8# (NMI) - Trigger by CPLD Watchdog module when enabled
 	 * and timeout.
 	 */
@@ -504,11 +470,9 @@ static const struct pad_config gpio_table[] = {
 	/* MCSI1_RST_1V8# - Reset the MIPI CSI camera interfaces 1 */
 	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_68, 0, DEEP, DN_20K, HIZCRx0, SAME),
 	/* MCSI0_PWR_1V8# - Power for the MIPI CSI camera interfaces 0 */
-	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_69, 0, DEEP, DN_20K, Tx1RxDCRx1,
-				     SAME),
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_69, 0, DEEP, DN_20K, Tx1RxDCRx1, SAME),
 	/* MCSI1_PWR_1V8# - Power for the MIPI CSI camera interfaces 1 */
-	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_70, 0, DEEP, DN_20K, Tx1RxDCRx1,
-				     SAME),
+	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_70, 0, DEEP, DN_20K, Tx1RxDCRx1, SAME),
 	/* Not connected */
 	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_71, 0, DEEP, DN_20K, HIZCRx0, SAME),
 	/* Not connected */
@@ -577,41 +541,29 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_4, DN_20K, PWROK, NF1, HIZCRx0, SAME),
 
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* STRAP_GPIO_39 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, DN_20K, DEEP, NF1, TxLASTRxE,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, DN_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
 	/* STRAP_GPIO_40 */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_40, DN_20K, DEEP, NF1, TxLASTRxE,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_40, DN_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
 	/* Not connected */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_41, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_41, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* CPU_UART1_RX to SMARC Connector SER0_RX */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* CPU_UART1_TX to SMARC Connector SER0_TX */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, DN_20K, DEEP, NF1, TxLASTRxE,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, DN_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
 	/* CPU_UART1_RTS_1V8# to SMARC Connector SER0_RTS# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44, UP_20K, DEEP, NF1, TxLASTRxE,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
 	/* CPU_UART1_CTS_1V8# to SMARC Connector SER0_CTS# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, UP_20K, DEEP, NF1, HIZCRx0,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD),
 	/* CPU_UART2_RX_1V8   to SMARC Connector SER2_RX */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_46, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_46, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* CPU_UART2_TX_1V8   to SMARC Connector SER2_TX */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_47, DN_20K, DEEP, NF1, TxLASTRxE,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_47, DN_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
 	/* CPU_UART2_RTS_1V8# to SMARC Connector SER2_RTS# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_48, DN_20K, DEEP, NF1, TxLASTRxE,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_48, DN_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
 	/* CPU_UART2_CTS_1V8# to SMARC Connector SER2_CTS# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_49, UP_20K, DEEP, NF1, HIZCRx0,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_49, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD),
 
 	/* Board ID - GPIO_223 */
 	PAD_CFG_GPI_INT(PMIC_RESET_B, DN_20K, DEEP, OFF),
@@ -635,32 +587,23 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_NF_IOSSTATE_IOSTERM(SMB_DATA, UP_20K, DEEP, NF1, MASK, SAME),
 
 	/* LPC_SERIRQ_CPU */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1, MASK,
-				    SAME),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1, MASK, SAME),
 	/* CLK_25M_LPC_TPM_CPU */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0, NONE, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* CLK_25M_LPC_CPLD_CPU */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* LPC_AD0_CPU */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1,
-			DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* LPC_AD1_CPU */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* LPC_AD2_CPU */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* LPC_AD3_CPU */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* LPC_CLKRUN# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 	/* LPC_FRAME_CPU# */
-	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1,
-				    DISPUPD),
+	PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
 };
 
 const struct pad_config *variant_early_gpio_table(size_t *num)