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| author | David Hendricks <dhendrix@chromium.org> | 2013-08-01 18:57:52 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 21:02:35 +0100 |
| commit | 1f9f04e57117aea8e06be4fc49f3d7fa8b096389 (patch) | |
| tree | 571a5bc50c699595f5696b608cd114b00319662d /src/mainboard | |
| parent | d598cac656d214bbdfdfa11426cca4bee6aed216 (diff) | |
| download | coreboot-1f9f04e57117aea8e06be4fc49f3d7fa8b096389.tar.xz | |
pit: update PMIC write sequence in romstage
This update the PMIC write sequence to be correct for newer board
revisions.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I2210b0d1945fb19c96a674c8fad1b0ff5a4a381e
Reviewed-on: https://gerrit.chromium.org/gerrit/64304
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/4427
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/pit/romstage.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c index c11f712e65..853e24dd70 100644 --- a/src/mainboard/google/pit/romstage.c +++ b/src/mainboard/google/pit/romstage.c @@ -59,7 +59,7 @@ struct pmic_write pmic_writes[] = { 0, MAX77802_REG_PMIC_BUCK1DVS1, MAX77802_BUCK1DVS1_1V }, { 1, MAX77802_REG_PMIC_BUCK1CTRL, MAX77802_BUCK_TYPE1_ON | MAX77802_BUCK_TYPE1_IGNORE_PWRREQ }, - { 0, MAX77802_REG_PMIC_BUCK2DVS1, MAX77802_BUCK2DVS1_1V }, + { 0, MAX77802_REG_PMIC_BUCK2DVS1, MAX77802_BUCK2DVS1_1_2625V }, { 1, MAX77802_REG_PMIC_BUCK2CTRL1, MAX77802_BUCK_TYPE2_ON | MAX77802_BUCK_TYPE2_IGNORE_PWRREQ }, { 0, MAX77802_REG_PMIC_BUCK3DVS1, MAX77802_BUCK3DVS1_1V }, @@ -71,7 +71,8 @@ struct pmic_write pmic_writes[] = { 0, MAX77802_REG_PMIC_BUCK6DVS1, MAX77802_BUCK6DVS1_1V }, { 1, MAX77802_REG_PMIC_BUCK6CTRL, MAX77802_BUCK_TYPE1_ON | MAX77802_BUCK_TYPE1_IGNORE_PWRREQ }, - { 1, MAX77802_REG_PMIC_LDO35CTRL1, MAX77802_LDO35CTRL1_1_2V }, + /* Disable Boost(bypass) OUTPUT */ + { 0, MAX77802_REG_PMIC_BOOSTCTRL, MAX77802_BOOSTCTRL_OFF}, }; static void setup_power(int is_resume) |