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authorarch import user (historical) <svn@openbios.org>2005-07-06 17:03:05 +0000
committerarch import user (historical) <svn@openbios.org>2005-07-06 17:03:05 +0000
commitb47a4d3347972704cc05b1a55c0af582764815aa (patch)
treeb2b16b3612b790411534bb97ffe9a89c836ac952 /src/mainboard
parent0b78ea7a28b4c6c703a10138cc3b6596854fff6f (diff)
downloadcoreboot-b47a4d3347972704cc05b1a55c0af582764815aa.tar.xz
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-24
Creator: Yinghai Lu <yhlu@tyan.com> AMD MB IDE enable in Config.lb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/quartet/Config.lb2
-rw-r--r--src/mainboard/amd/serenade/Config.lb2
-rw-r--r--src/mainboard/amd/solo/Config.lb2
3 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/amd/quartet/Config.lb b/src/mainboard/amd/quartet/Config.lb
index 2d0ff10542..2d818d40d1 100644
--- a/src/mainboard/amd/quartet/Config.lb
+++ b/src/mainboard/amd/quartet/Config.lb
@@ -172,6 +172,8 @@ chip northbridge/amd/amdk8/root_complex
device pci 1.3 on end
device pci 1.5 on end
device pci 1.6 on end
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
end # 8111
end # device pci 18.0
device pci 18.1 on end
diff --git a/src/mainboard/amd/serenade/Config.lb b/src/mainboard/amd/serenade/Config.lb
index c80297ddb2..4fdc235507 100644
--- a/src/mainboard/amd/serenade/Config.lb
+++ b/src/mainboard/amd/serenade/Config.lb
@@ -184,6 +184,8 @@ chip northbridge/amd/amdk8/root_complex
device pci 1.3 on end
device pci 1.5 off end
device pci 1.6 off end
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
end
end # device pci 18.0
diff --git a/src/mainboard/amd/solo/Config.lb b/src/mainboard/amd/solo/Config.lb
index 7ce6031cbe..fdf3c1c769 100644
--- a/src/mainboard/amd/solo/Config.lb
+++ b/src/mainboard/amd/solo/Config.lb
@@ -199,6 +199,8 @@ chip northbridge/amd/amdk8/root_complex
end
device pci 1.5 off end
device pci 1.6 on end
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
end
end # device pci 18.0