for tyan. recover from Eric B's error additions to via code :-)

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1220 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 63 insertions, 43 deletions

diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb
index d05f4e6967..87f54b925b 100644
--- a/src/mainboard/tyan/s2880/Config.lb
+++ b/src/mainboard/tyan/s2880/Config.lb
@@ -142,20 +142,24 @@ northbridge amd/amdk8 "mc0"
         pci 0:18.1
         pci 0:18.2
         pci 0:18.3
-        southbridge amd/amd8131 "amd8131"
+        southbridge amd/amd8131 "amd8131" link 0
                 pci 0:0.0
                 pci 0:0.1
                 pci 0:1.0
                 pci 0:1.1
 	end
-        southbridge amd/amd8111 "amd8111"
+        southbridge amd/amd8111 "amd8111" link 0
                 pci 0:0.0
-                pci 0:1.0
-                pci 0:1.1
-                pci 0:1.2
-                pci 0:1.3
-                pci 0:1.5
-                pci 0:1.6
+                pci 0:1.0 on
+                pci 0:1.1 on
+                pci 0:1.2 on
+                pci 0:1.3 on
+                pci 0:1.5 off
+                pci 0:1.6 off
+                pci 1:0.0 on
+                pci 1:0.1 on
+                pci 1:0.2 on
+                pci 1:1.0 off
         end
 end
 
@@ -182,7 +186,7 @@ end
 #end
 dir /pc80
 ##dir /src/superio/winbond/w83627hf
-dir /bioscall
+#dir /bioscall
 #dir /cpu/k8
 cpu k8 "cpu0"
   register "up" = "{.chip = &amd8131, .ht_width=16, .ht_speed=600}"
diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c
index 07bcc1d92f..b5135d1a5c 100644
--- a/src/mainboard/tyan/s2880/auto.c
+++ b/src/mainboard/tyan/s2880/auto.c
@@ -15,6 +15,8 @@
 #include "cpu/p6/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "debug.c"
+#include "northbridge/amd/amdk8/cpu_rev.c"
+
 
 #define REV_B_RESET 0
 static void memreset_setup(void)
@@ -88,8 +90,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 /* include mainboard specific ht code */
 #include "hypertransport.c"
 
-#include "northbridge/amd/amdk8/cpu_ldtstop.c"
-#include "southbridge/amd/amd8111/amd8111_ldtstop.c"
+//#include "northbridge/amd/amdk8/cpu_ldtstop.c"
+//#include "southbridge/amd/amd8111/amd8111_ldtstop.c"
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
@@ -162,7 +164,7 @@ static void main(void)
 	enable_lapic();
 	init_timer();
 	if (!boot_cpu() ) {
-		notify_bsp_ap_is_stopped();
+//		notify_bsp_ap_is_stopped();
 		stop_this_cpu();
 	}
 	uart_init();
diff --git a/src/mainboard/tyan/s2882/Config.lb b/src/mainboard/tyan/s2882/Config.lb
index 9c9fc016b5..7f06909c66 100644
--- a/src/mainboard/tyan/s2882/Config.lb
+++ b/src/mainboard/tyan/s2882/Config.lb
@@ -13,6 +13,7 @@ uses ARCH
 ###
 ### Build the objects we have code for in this directory.
 ###
+##object mainboard.o
 config chip.h
 register "fixup_scsi" = "1" 
 register "fixup_vga" = "1"
@@ -140,20 +141,24 @@ northbridge amd/amdk8 "mc0"
         pci 0:18.1
         pci 0:18.2
         pci 0:18.3
-        southbridge amd/amd8131 "amd8131"
+        southbridge amd/amd8131 "amd8131" link 0
                 pci 0:0.0
                 pci 0:0.1
                 pci 0:1.0
                 pci 0:1.1
         end
-        southbridge amd/amd8111 "amd8111"
+        southbridge amd/amd8111 "amd8111" link 0
                 pci 0:0.0
-                pci 0:1.0
-                pci 0:1.1
-                pci 0:1.2
-                pci 0:1.3
-                pci 0:1.5
-                pci 0:1.6
+                pci 0:1.0 on
+                pci 0:1.1 on
+                pci 0:1.2 on
+                pci 0:1.3 on
+                pci 0:1.5 off
+                pci 0:1.6 off
+                pci 1:0.0 on
+                pci 1:0.1 on
+                pci 1:0.2 on
+                pci 1:1.0 off
         end
 end
 
@@ -179,7 +184,7 @@ end
 #end
 dir /pc80
 ##dir /src/superio/winbond/w83627hf
-dir /bioscall
+#dir /bioscall
 #dir /cpu/k8
 cpu k8 "cpu0"
   register "up" = "{.chip = &amd8131, .ht_width=16, .ht_speed=600}"
diff --git a/src/mainboard/tyan/s2882/auto.c b/src/mainboard/tyan/s2882/auto.c
index 2de3c2f5c4..cbd54c348c 100644
--- a/src/mainboard/tyan/s2882/auto.c
+++ b/src/mainboard/tyan/s2882/auto.c
@@ -15,6 +15,8 @@
 #include "cpu/p6/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "debug.c"
+#include "northbridge/amd/amdk8/cpu_rev.c"
+ 
 
 static void memreset_setup(void)
 {
@@ -84,8 +86,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 /* include mainboard specific ht code */
 #include "hypertransport.c"
 
-#include "northbridge/amd/amdk8/cpu_ldtstop.c"
-#include "southbridge/amd/amd8111/amd8111_ldtstop.c"
+//#include "northbridge/amd/amdk8/cpu_ldtstop.c"
+//#include "southbridge/amd/amd8111/amd8111_ldtstop.c"
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
@@ -182,7 +184,7 @@ static void main(void)
 	memreset_setup();
 	sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
 
-#if 1
+#if 0
 	dump_pci_devices();
 #endif
 #if 0
diff --git a/src/mainboard/tyan/s2882/mptable.c b/src/mainboard/tyan/s2882/mptable.c
index 01cabe127c..6f1ce50602 100644
--- a/src/mainboard/tyan/s2882/mptable.c
+++ b/src/mainboard/tyan/s2882/mptable.c
@@ -88,7 +88,7 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 #endif
 //Onboard SI Serial ATA
 //	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x14, 0x2, 0x11);
-#if 0
+#if 1
 //Slot 3 PCIX 100/66
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x20, 0x3, 0x3);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x21, 0x3, 0x0);
@@ -107,7 +107,7 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 //On Board NIC
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x24, 0x3, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x25, 0x3, 0x1);
-#if 0
+#if 1
 //Slot 1 PCI-X 133/100/66
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0xc, 0x4, 0x0);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0xd, 0x4, 0x1);
diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb
index a234b03841..ba172926b2 100644
--- a/src/mainboard/tyan/s2885/Config.lb
+++ b/src/mainboard/tyan/s2885/Config.lb
@@ -13,6 +13,7 @@ uses ARCH
 ###
 ### Build the objects we have code for in this directory.
 ###
+##object mainboard.o
 config chip.h
 register "fixup_scsi" = "1"
 register "fixup_vga" = "1"
@@ -141,24 +142,29 @@ northbridge amd/amdk8 "mc0"
         pci 0:18.1
         pci 0:18.2
         pci 0:18.3
-        southbridge amd/amd8131 "amd8131"
+        southbridge amd/amd8131 "amd8131" link 2
                 pci 0:0.0
                 pci 0:0.1
                 pci 0:1.0
                 pci 0:1.1
 	end
-	southbridge amd/amd8111 "amd8111"
+	southbridge amd/amd8111 "amd8111" link 2
        	       	pci 0:0.0
-	       	pci 0:1.0
-	        pci 0:1.1
-	        pci 0:1.2
-	        pci 0:1.3
-	        pci 0:1.5
-	        pci 0:1.6
+	       	pci 0:1.0 on
+	        pci 0:1.1 on
+	        pci 0:1.2 on
+	        pci 0:1.3 on
+	        pci 0:1.5 on
+	        pci 0:1.6 off
+                pci 1:0.0 on
+                pci 1:0.1 on
+                pci 1:0.2 on
+                pci 1:1.0 off
+ 
 	end
-        southbridge amd/amd8151 "amd8151"
-                pci 2:0.0
-                pci 2:1.0
+        southbridge amd/amd8151 "amd8151" link 0
+                pci 0:0.0
+                pci 0:1.0
         end
 end
 
@@ -187,7 +193,7 @@ end
 #end
 dir /pc80
 ##dir /src/superio/winbond/w83627hf
-dir /bioscall
+#dir /bioscall
 #dir /cpu/k8
 cpu k8 "cpu0"
   register "up" = "{.chip = &amd8151, .ht_width=16, .ht_speed=600}"
diff --git a/src/mainboard/tyan/s2885/auto.c b/src/mainboard/tyan/s2885/auto.c
index 30e3c22097..4d8ba2176b 100644
--- a/src/mainboard/tyan/s2885/auto.c
+++ b/src/mainboard/tyan/s2885/auto.c
@@ -16,6 +16,8 @@
 #include "cpu/p6/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "debug.c"
+#include "northbridge/amd/amdk8/cpu_rev.c"
+
 
 #define REV_B_RESET 0
 static void memreset_setup(void)
@@ -89,9 +91,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 /* include mainboard specific ht code */
 #include "hypertransport.c"
 
-#include "northbridge/amd/amdk8/cpu_ldtstop.c"
-#include "southbridge/amd/amd8111/amd8111_ldtstop.c"
-
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "sdram/generic_sdram.c"
diff --git a/src/mainboard/tyan/s2885/resourcemap.c b/src/mainboard/tyan/s2885/resourcemap.c
index db5957ec07..f2535bf02f 100644
--- a/src/mainboard/tyan/s2885/resourcemap.c
+++ b/src/mainboard/tyan/s2885/resourcemap.c
@@ -254,6 +254,8 @@ static void setup_s2885_resource_map(void)
 	 */
 	PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x04000203,
 	PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x06050003,
+//        PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x00000203,
+//        PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
 	PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
 	PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 	};
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c
index fa83d5c3c1..4b6632d196 100644
--- a/src/mainboard/via/epia/auto.c
+++ b/src/mainboard/via/epia/auto.c
@@ -26,8 +26,8 @@ void udelay(int usecs)
 
 #include "southbridge/via/vt8231/vt8231_early_smbus.c"
 
-#define MAXIMUM_CONSOLE_LOGLEVEL 9
-#define DEFAULT_CONSOLE_LOGLEVEL 9
+#define MAXIMUM_CONSOLE_LOGLEVEL 6
+#define DEFAULT_CONSOLE_LOGLEVEL 6
 
 #include "southbridge/via/vt8231/vt8231_early_serial.c"
 static void memreset_setup(void)